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参数资料
| 型号： | EPC16UC88 |
| 厂商： | Altera Corporation |
| 英文描述： | 2. Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet |
| 中文描述： | 2。增强型配置器件（EPC4，EPC8 |
| 文件页数： | 9/36页 |
| 文件大小： | 421K |
| 代理商： | EPC16UC88 |
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Altera Corporation
August 2005
2–9
Configuration Handbook, Volume 2
Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet
After the first FPGA completes configuration, its
nCEO
pin asserts to
activate the second FPGA’s
nCE
pin, which prompts the second device to
start capturing configuration data. In this setup, the FPGAs
CONF_DONE
pins are tied together, and hence all devices initialize and enter user mode
simultaneously. If the enhanced configuration device or one of the FPGAs
detects an error, configuration stops (and simultaneously restarts) for the
whole chain because the
nSTATUS
pins are tied together.
1
While Altera FPGAs can be cascaded in a configuration chain,
the enhanced configuration devices cannot be cascaded to
configure larger devices/chains.
f
For configuration schematics and more information on multi-device FPP
configuration, refer to the appropriate FPGA family chapter in the
Configuration
Handbook
.
Passive Serial Configuration
Stratix series, Cyclone series, APEX II, APEX 20KC, APEX 20KE,
APEX 20K, and FLEX 10K devices can be configured using enhanced
configuration devices in the PS mode. This mode is similar to the FPP
mode, with the exception that only one bit of data (
DATA[0]
) is
transmitted to the FPGA per
DCLK
cycle. The remaining
DATA[7..1]
output pins are unused in this mode and drive low.
The configuration schematic for PS configuration of a single FPGA or
single serial chain is identical to the FPP schematic (with the exception
that only
DATA[0]
output from the enhanced configuration device
connects to the FPGA
DATA0
input pin; remaining
DATA[7..1]
pins are
left floating).
f
For configuration schematics and more information on multi-device PS
configuration, refer to the appropriate FPGA family chapter in the
Configuration
Handbook
.
Concurrent Configuration
The enhanced configuration device supports concurrent configuration of
multiple FPGAs (or FPGA chains) in PS mode. Concurrent configuration
is when the enhanced configuration device simultaneously outputs n bits
of configuration data on the
DATA[n-1..0]
pins (n = 1, 2, 4, or 8), and
each
DATA[]
line serially configures a different FPGA (chain). The
number of concurrent serial chains is user-defined via the Quartus II
software and can be any number between 1 and 8. For example, three
concurrent chains you can select the 4-bit PS mode, and connect the least
相关PDF资料 |
PDF描述 |
|---|---|
| EPCS1 | Serial Configuration Devices |
| EPCS16 | Serial Configuration Devices |
| EPCS16SI16N | Serial Configuration Devices |
| EPCS1SI8N | Serial Configuration Devices |
| EPCS4 | Serial Configuration Devices |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EPC16UC88AA | 功能描述:IC CONFIG DEVICE 16MBIT 88-UBGA RoHS:否 类别:集成电路 (IC) >> 存储器 - 用于 FPGA 的配置 Proms 系列:EPC 产品变化通告:Product Discontinuation 28/Jul/2010 标准包装:98 系列:- 可编程类型:OTP 存储容量:300kb 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-TSOP 包装:管件 |
| EPC16UC88N | 功能描述:FPGA-配置存储器 IC - Ser. Config Mem Flash 16Mb 33 MHz RoHS:否 制造商:Altera Corporation 存储类型:Flash 存储容量:1.6 Mbit 工作频率:10 MHz 电源电压-最大:5.25 V 电源电压-最小:3 V 电源电流:50 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:PLCC-20 |
| EPC16UI88AA | 功能描述:FPGA-配置存储器 IC - Ser. Config Mem Flash 16Mb 33 MHz RoHS:否 制造商:Altera Corporation 存储类型:Flash 存储容量:1.6 Mbit 工作频率:10 MHz 电源电压-最大:5.25 V 电源电压-最小:3 V 电源电流:50 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:PLCC-20 |
| EPC16UI88N | 功能描述:FPGA-配置存储器 IC - Ser. Config Mem Flash 16Mb 33 MHz RoHS:否 制造商:Altera Corporation 存储类型:Flash 存储容量:1.6 Mbit 工作频率:10 MHz 电源电压-最大:5.25 V 电源电压-最小:3 V 电源电流:50 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:PLCC-20 |
| EPC16XXX | 制造商:ALTERA 制造商全称:Altera Corporation 功能描述:2. Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet |
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