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| 型号： | EPC8QI100 |
| 厂商： | Altera Corporation |
| 英文描述： | 2. Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet |
| 中文描述： | 2。增强型配置器件（EPC4，EPC8 |
| 文件页数： | 17/36页 |
| 文件大小： | 421K |
| 代理商： | EPC8QI100 |
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Altera Corporation
August 2005
2–17
Configuration Handbook, Volume 2
Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet
1
The decompression feature supported in the enhanced
configuration devices is different from the decompression
feature supported by the Stratix II FPGAs and the Cyclone
series. When configuring Stratix II FPGAs or the Cyclone series
using enhanced configuration devices, Altera recommends
enabling decompression in Stratix II FPGAS or the Cyclone
series only for faster configuration.
The compression algorithm used in Altera devices is optimized for FPGA
configuration bitstreams. Since FPGAs have several layers of routing
structures (for high performance and easy routability), large amounts of
resources go unused. These unused routing and logic resources as well as
un-initialized memory structures result in a large number of
configuration RAM bits in the disabled state. Altera's proprietary
compression algorithm takes advantage of such bitstream qualities.
The general guideline for effectiveness of compression is the higher the
device logic/routing utilization, the lower the compression ratio (where
compression ratio is defined as original bitstream size divided by the
compressed bit-stream size).
For Stratix designs, based on a suite of designs with varying amounts of
logic utilization, the minimum compression ratio was observed to be 1.9
or a ~47
%
size reduction for these designs.
Table 2–5
shows sample
compression ratios from a suite of Stratix designs. These numbers serve
as a guideline (not a specification) to help you allocate sufficient
configuration memory to store compressed bitstreams.
Table 2–5. Stratix Compression Ratios
Note (1)
Minimum
Average
Logic Utilization
98
%
64
%
Compression Ratio
1.9
2.3
%
Size Reduction
47
%
57
%
Note to
Table 2–5
:
(1)
These numbers are preliminary. They are intended to serve as a guideline, not a
specification.
相关PDF资料 |
PDF描述 |
|---|---|
| EPC16xxx | 435882001 |
| EPC4QC100 | 2. Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet |
| EPC4QI100 | 2. Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet |
| EPC16UC88 | 2. Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet |
| EPCS1 | Serial Configuration Devices |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EPC8QI100N | 功能描述:FPGA-配置存储器 IC - Ser. Config Mem Flash 8Mb 50 MHz RoHS:否 制造商:Altera Corporation 存储类型:Flash 存储容量:1.6 Mbit 工作频率:10 MHz 电源电压-最大:5.25 V 电源电压-最小:3 V 电源电流:50 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:PLCC-20 |
| EPC8XXX | 制造商:ALTERA 制造商全称:Altera Corporation 功能描述:2. Enhanced Configuration Devices (EPC4, EPC8 & EPC16) Data Sheet |
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