参数资料
型号: EPCS4SI8
厂商: Altera
文件页数: 22/40页
文件大小: 0K
描述: IC CONFIG DEVICE 4MBIT 8-SOIC
产品培训模块: Three Reasons to Use FPGA's in Industrial Designs
标准包装: 100
系列: EPCS
可编程类型: 系统内可编程
存储容量: 4Mb
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
产品目录页面: 604 (CN2011-ZH PDF)
其它名称: 544-1243-5
Timing Information
Page 29
Serial Configuration (EPCS) Devices Datasheet
January 2014
Altera Corporation
Timing Information
Figure 18 shows the timing waveform for the write operation of the EPCS device.
Table 16 lists the EPCS device timing parameters for the write operation.
Figure 18. Write Operation Timing Diagram
nCS
DCLK
ASDI
DATA
tNCSH
tDSU
tNCSSU
tCH
tCL
tCSH
tDH
Bit n
Bit 0
Bit n
1
High Impedance
Table 16. Write Operation Parameters
Symbol
Parameter
Min
Typ
Max
Unit
fWCLK
Write clock frequency (from the FPGA, download cable, or
embedded processor) for write enable, write disable, read status,
read silicon ID, write bytes, erase bulk, and erase sector
operations
——
25
MHz
tCH
DCLK
high time
20
ns
tCL
DCLK
low time
20
——ns
tNCSSU
Chip select (nCS) setup time
10
ns
tNCSH
Chip select (nCS) hold time
10
ns
tDSU
Data (ASDI) in setup time before the rising edge on DCLK
5
——ns
tDH
Data (ASDI) hold time after rising edge on DCLK
5
——ns
tCSH
Chip select (nCS) high time
100
ns
tWB (1)
Write bytes cycle time for EPCS1, EPCS4, EPCS16, and EPCS64
devices
—1.5
5
ms
Write bytes cycle time for the EPCS128 device
2.5
7
ms
tWS (1)
Write status cycle time
5
15
ms
tEB (1)
Erase bulk cycle time for the EPCS1 device
3
6
s
Erase bulk cycle time for the EPCS4 device
5
10
s
Erase bulk cycle time for the EPCS16 device
17
40
s
Erase bulk cycle time for the EPCS64 device
68
160
s
Erase bulk cycle time for the EPCS128 device
105
250
s
tES (1)
Erase sector cycle time for EPCS1, EPCS4, EPCS16, and EPCS64
devices
—2
3
s
Erase sector cycle time for the EPCS128 device
2
6
s
Note to Table 16:
(1) Figure 18 does not show these parameters.
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