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参数资料
| 型号： | EPF10K100B |
| 厂商： | Altera Corporation |
| 英文描述： | Embedded Programmable Logic Family(FLEX10KE嵌入式可编程逻辑系列) |
| 中文描述： | 嵌入式可编程逻辑系列（FLEX10KE嵌入式可编程逻辑系列） |
| 文件页数： | 2/8页 |
| 文件大小： | 193K |
| 代理商： | EPF10K100B |
Philips Semiconductors
Application note
AN101
Applying the DAC08
2
1988 Dec
Reference Amplifier Setup
The DAC08 Series are multiplying D-to-A converters in which the
output current is the product of a digital number and the input
reference current. The reference current may be fixed or may vary
from nearly zero to +4.0mA. The full-scale output current is a linear
function of the reference current and is given by this equalization
where I
REF
=I
14
.
I
FS
255
256
x I
REF
In positive reference applications shown in Figure 1, an external
positive reference voltage forces current through R14 into the V
REF
(+) terminal (Pin 14) of the reference amplifier. Alternatively, a
negative reference may be applied to V
REF
(-) at Pin 15, shown in
Figure 2. Reference current flows from ground through R14 into
V
REF
(+) as in the positive reference case. This negative reference
connection has the advantage of a very high impedance presented
at Pin 15. The voltage at Pin 14 is equal to and tracks the voltage at
Pin 15 due to the high gain of the internal reference amplifier. R15
(nominally equal to R14) is used to cancel bias current errors. R15
may be eliminated with only a minor increase in error.
Bipolar references may be accommodated by offsetting V
REF
or Pin
15 as shown in Figure 3. The negative common-mode range of the
reference amplifier is given by the following equation:
V
CM
V
(I
REF
1k )
2.5V
When a DC reference is used, a reference bypass capacitor is
recommended. A 5.0V TTL logic supply is not recommended as a
reference. If a regulated power supply is used as a reference, R14
should be split into 2 resistors with the junction bypassed to ground
with a 0.1
μ
F capacitor.
For most applications, a +10.0V reference is recommended for
optimum full-scale temperature coefficient performance. This will
minimize the contributions of reference amplifier V
OS
and TCV
OS
.
For most applications, the tight relationship between I
REF
and I
FS
will eliminate the need for trimming I
REF
. If required, full-scale
trimming may be accomplished by adjusting the value of R14, or by
using a potentiometer for R14. An improved method of full-scale
trimming which eliminates potentiometer TC effects is shown in
Figure 4.
Using lower values of reference current reduces negative power
supply current and increases reference amplifier negative
common-mode range. The recommended range for operation with a
DC reference current is +0.2mA to +4.0mA.
The reference amplifier must be compensated by using a capacitor
from Pin 16 to V-. For fixed reference operation, a 0.01
μ
F capacitor
is recommended. For variable reference applications, see section
entitled “Reference Amplifier Compensation for Multiplying
Applications”.
Multiplying Operation
The DAC08 Series provides excellent multiplying performance with
an extremely linear relationship between I
FS
and I
REF
over a range
of 4mA to 4
μ
A. Monotonic operation is maintained over a typical
range of I
REF
from 100
μ
A to 4.0mA.
Reference Amplifier Compensation for Multiplying
Applications
AC reference applications will require the reference amplifier to be
compensated using a capacitor from Pin 16 to V-. The value of this
capacitor depends on the impedance presented to Pin 14. For R14
values of 1.0, 2.5 and 5.0k
, minimum values of C
C
are 15, 37 and
75pF. Larger values of R14 require proportionately increased values
of C
C
for proper phase margin.
For fastest multiplying response, low values of R14 enabling small
C
C
values should be used. If Pin 14 is driven by a high impedance
such as a transistor current source, none of the preceding values
will suffice and the amplifier must be heavily compensated, which
will decrease overall bandwidth and slew rate. For R14=1k
and
CC=15pF, the reference amplifier slews at 4mA/
μ
s enabling a
transition from I
REF
=0 to I
REF
=2mA in 500ns.
V
REF (–)
I
REF
V
REF (+)
R
(R14)
R
15
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
I
O
1
0
V
LC
V–
V–
COMP
C
C
0.1
μ
F
V+
V–
1
μ
F
5
6
7
8
9
10 11 12
4
2
1
13
16
3
15
14
MSB
LSB
DAC08
IFS
VREF
RREF
x
255
256
IO
IO
IFSfor all logic states
For fixed reference, TTL operation typical values are:
V
REF
= +10.000V, R
REF
= 5,000
, R15
≈
R
REF
C
C
= 0.01
μ
F, V
LC
= 0V (ground)
NOTES:
SL00681
Figure 1. Basic Positive Reference Operation
Operation with pulse inputs to the reference amplifier may be
accommodated by an alternate compensation scheme shown in
Figure 5. This technique provides lowest full-scale transition times.
Full-scale transition (0 to 2mA) occurs in 120ns when the equivalent
impedance at Pin 14 is 200
and C
C
=0. This yields a reference
slew rate of 16mA/
μ
s, which is relatively independent of R
IN
and V
IN
values.
Logic Inputs
The DAC08 design incorporates a logic input circuit which enables
direct interface to all popular logic families and provides maximum
noise immunity. This feature is made possible by the large input
swing capability, 2
μ
A logic input current and completely adjustable
logic threshold voltage. For V-=-15V, the logic inputs may swing
between -11V and +18V. This enables direct interface with +15V
CMOS logic, even when the DAC08 is powered from a +5V supply.
Minimum input logic swing is given by the following equation:
V
(I
REF
1k )
2.5V
The logic threshold may be adjusted over a wide range by placing
an appropriate voltage at the logic threshold control in (Pin 1, V
LC
).
Figure 6 shows the relationship between V
LC
and V
TH
over the
temperature range, with V
TH
nominally 1.4 above V
LC
. For TTL and
DTL interface, simply ground Pin 1. When interfacing ECL, an
I
REF
=1mA is recommended. For interfacing other logic families, see
Figure 7. For general setup of the logic control circuit, it should be
noted that Pin 1 may source up to 200
μ
A. External circuitry should
be designed to accommodate this current.
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