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参数资料
型号： EPF10K130EBC600-3
英文描述： Field Programmable Gate Array (FPGA)
中文描述： 现场可编程门阵列（FPGA）
文件页数： 118/120页
文件大小： 1901K
代理商： EPF10K130EBC600-3
Altera Corporation
97
FLEX 10KE Embedded Programmable Logic Family Data Sheet
Figure 29. FLEX 10KE ICCACTIVE vs. Operating Frequency (Part 2 of 2)
Conguration &
Operation
The FLEX 10KE architecture e supports several configuration schemes.
This section summarizes the device operating modes and available device
configuration schemes.
Operating Modes
The FLEX 10KE architecture uses SRAM configuration elements that
require configuration data to be loaded every time the circuit powers up.
The process of physically loading the SRAM data into the device is called
configuration. Before configuration, as VCC rises, the device initiates a
Power-On Reset (POR). This POR event clears the device and prepares it
for configuration. The FLEX 10KE POR time does not exceed 50 s;
however, when configuring with a configuration device, the
configuration device imposes a 100-ms delay that allows system power to
stabilize before configuration.
During initialization, which occurs immediately after configuration, the
device resets registers, enables I/O pins, and begins to operate as a logic
device. The I/O pins are tri-stated during power-up, and before and
during configuration. Together, the configuration and initialization
processes are called command mode; normal device operation is called user
mode.
SRAM configuration elements allow FLEX 10KE devices to be
reconfigured in-circuit by loading new configuration data into the device.
Real-time reconfiguration is performed by forcing the device into
command mode with a device pin, loading different configuration data,
reinitializing the device, and resuming user-mode operation. The entire
reconfiguration process requires less than 85 ms and can be used to
reconfigure an entire system dynamically. In-field upgrades can be
performed by distributing new configuration files.
0
Frequency (MHz)
600
400
200
50
100
EPF10K200S
ICC Supply
Current (mA)
0
Frequency (MHz)
600
400
200
50
100
EPF10K200E
ICC Supply
Current (mA)
相关PDF资料
PDF描述
EPF10K130EBI356-2 Field Programmable Gate Array (FPGA)
EPF10K130EBI600-2 Field Programmable Gate Array (FPGA)
EPF10K130EFC484-1 Field Programmable Gate Array (FPGA)
EPF10K130EFC484-2 Field Programmable Gate Array (FPGA)
EPF10K200EFC672-1 Field Programmable Gate Array (FPGA)
相关代理商/技术参数
参数描述
EPF10K130EBI356-2 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 832 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K130EBI600-2 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field Programmable Gate Array (FPGA)
EPF10K130EFC484-1 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 832 LABs 369 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K130EFC484-1N 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 832 LABs 369 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EPF10K130EFC484-1X 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 832 LABs 369 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
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