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参数资料
| 型号： | EPF10K200E |
| 厂商： | Altera Corporation |
| 英文描述： | Embedded Programmable Logic Family(FLEX10KE嵌入式可编程逻辑系列) |
| 中文描述： | 嵌入式可编程逻辑系列（FLEX10KE嵌入式可编程逻辑系列） |
| 文件页数： | 7/121页 |
| 文件大小： | 2001K |
| 代理商： | EPF10K200E |
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Altera Corporation
7
Preliminary Information
FLEX 10KE Embedded Programmable Logic Family Data Sheet
FLEX 10KE devices are supported by the Quartus and MAX+PLUS II
development systems, which are integrated packages that offer
schematic, text (including AHDL), and waveform design entry,
compilation and logic synthesis, full simulation and worst-case timing
analysis, and device configuration. The Quartus and MAX+PLUS II
software provides EDIF 2 0 0 and 3 0 0, LPM, VHDL, Verilog HDL, and
other interfaces for additional design entry and simulation support from
other industry-standard PC- and UNIX workstation-based EDA tools.
The Quartus and MAX+PLUS II software works easily with common gate
array EDA tools for synthesis and simulation. For example, the
MAX+PLUS II software can generate Verilog HDL files for simulation
with tools such as Cadence Verilog-XL. Additionally, the Quartus and
MAX+PLUS II software contains EDA libraries that use device-specific
features such as carry chains which are used for fast counter and
arithmetic functions. For instance, the Synopsys Design Compiler library
supplied with the Quartus and MAX+PLUS II development systems
include DesignWare functions that are optimized for the FLEX 10KE
architecture.
The MAX+PLUS II development system runs on Windows-based PCs and
Sun SPARCstation, HP 9000 Series 700/800, and IBM RISC System/6000
workstations, and the Quartus development system runs on Windows-
based PCs, and Sun SPARCstation and HP 9000 Series 700 workstations.
f
See the
Data Sheet
and the
Software Data Sheet
for more information.
MAX+PLUS II Programmable Logic Development System & Software
Quartus Programmable Logic Development System &
Functional
Description
Each FLEX 10KE device contains an enhanced embedded array to
implement memory and specialized logic functions, and a logic array to
implement general logic.
The embedded array consists of a series of EABs. When implementing
memory functions, each EAB provides 4,096 bits, which can be used to
create RAM, ROM, dual-port RAM, or first-in first-out (FIFO) functions.
When implementing logic, each EAB can contribute 100 to 600 gates
towards complex logic functions, such as multipliers, microcontrollers,
state machines, and DSP functions. EABs can be used independently, or
multiple EABs can be combined to implement larger functions.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EPF10K200EBC600-1 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 1248 LABs 470 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K200EBC600-2 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 1248 LABs 470 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K200EBC600-3 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 1248 LABs 470 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K200EBI600-2 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 1248 LABs 470 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K200EFC672-1 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 1248 LABs 470 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
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