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| 型号： | EPF10K30A |
| 厂商： | Altera Corporation |
| 英文描述： | Embedded Programmable Logic Family(FLEX10K嵌入式可编程逻辑系列) |
| 中文描述： | 嵌入式可编程逻辑系列（FLEX10K嵌入式可编程逻辑系列） |
| 文件页数： | 4/8页 |
| 文件大小： | 193K |
| 代理商： | EPF10K30A |
Philips Semiconductors
Application note
AN101
Applying the DAC08
1988 Dec
4
range. Full-scale output current drift is low, typically
±
10ppm/
°
C with
zero-scale output current and drift essentially negligible compared to
LSB.
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
–50
0
+50
+100
+150
TEMPERATURE (+C)
V
T
L
SL00686
Figure 6. V
TH
– V
LC
vs Temperature
Full-scale output drift performance will be best with +10.0V
references, as V
OS
and TCV
OS
of the reference amplifier will be
very small compared to 10.0V. The temperature coefficient of the
reference resistor R14 should match and track that of the output
resistor for minimum overall full-scale drift. Settling times of the
DAC08 decrease approximately 10% at -55
°
C, and an increase of
about 15% at +125
°
C is typical.
Settling Time
The DAC08 is capable of extremely fast settling times (typically
70ns at I
REF
=2.0mA).
Judicious circuit design and careful board layout must be employed
to obtain full performance potential during testing and application.
The logic switch design enables propagation delays of only 35ns for
each of the 8 bits. Settling time to within LSB is therefore 35ns, with
each progressively larger bit taking successively longer. The MSB
settles in 70ns, thus determining the overall settling time of 70ns.
Settling to 6-bit accuracy requires about 55 to 60ns. The output
capacitance, including the package, is approximately 15pF.
Therefore, the output RC time constant dominates settling time if R
L
>500
.
Settling time and propagation delay are relatively insensitive to logic
input amplitude and rise and fall times due to the high gain of the
logic switches. Settling time also remains essentially constant for
I
REF
values down to 1.0mA, with gradual increases for lower I
REF
values. The principal advantage of higher I
REF
values lies in the
ability to attain a given output level with lower load resistors, thus
reducing the output RC time constant.
Measurement of settling time requires the ability to accurately
resolve
±
4
μ
A. Therefore, a 1k
load is needed to provide adequate
drive for most oscilloscopes. The settling time fixture of Figure 8
uses a cascade design to permit driving a 1k
load with less than
5pF of parasite capacitance at the measurement node. At I
REF
values of less than 1.0mA, excessive RC damping of the output is
difficult to prevent while maintaining adequate sensitivity. However,
the major carry from 01111111 to 10000000 provides an accurate
indicator of settling time. This code change does not require the
normal 6.2 time constants to settle to within
±
0.2% of the final value;
thus, settling time may be observed at lower values of I
REF
.
The DAC08 switching transients or glitches are very low and may be
further reduced by small capacitive loads at the output at a minor
sacrifice in settling time.
Fastest operation can be obtained by using short leads, minimizing
output capacitance and load resistor values, and by adequate
bypassing at the supply, reference and V
LC
terminals. Supplies do
not require large electrolytic bypass capacitors as the supply current
drain is dependent of input logic states. 0.1
μ
F capacitors at the
supply pins provide full transient performance.
+5V CMOS
V
TH
= 5.0V
+10V
6.2k
TTL, DTL
V
TH
= +1.4V
DAC08
V
LC
V
TH
= V
LC
+1.4V
+15V CMOS, HTL, HNIL
V
THY
= +7.6V
+12V
TO
10k
V
LC
6.2V
ZENER
6.2k
+15V
9.1k
V
LC
0.1
μ
F
PMOS
V
TH
= 0V
IN4148
V
LC
10k
–5V TO –10V
+5V CMOS
V
TH
= 2.8V
V
LC
IN4148
V
LC
0.1
μ
F
3.6k
1.3
k
3.9
k
10K ECL
V
TH
=1.29V
2N3904
IN4148
V
LC
1
k
–5.2V
DAC08
SL00687
Figure 7. Interfacing With Various Logic Families
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EPF10K30ABC3561 | 制造商:ALTERA 功能描述:* |
| EPF10K30ABC356-1 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 216 LABs 246 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K30ABC3562 | 制造商:ALTERA 功能描述:New |
| EPF10K30ABC356-2 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 216 LABs 246 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EPF10K30ABC356-3 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Flex 10K 216 LABs 246 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
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