- 您现在的位置：买卖IC网 > PDF目录22149 > EPM1270F256C4N (Altera)IC MAX II CPLD 1270 LE 256-FBGA PDF资料下载
参数资料
| 型号： | EPM1270F256C4N |
| 厂商： | Altera |
| 文件页数： | 2/6页 |
| 文件大小： | 0K |
| 描述： | IC MAX II CPLD 1270 LE 256-FBGA |
| 标准包装： | 90 |
| 系列： | MAX® II |
| 可编程类型： | 系统内可编程 |
| 最大延迟时间 tpd(1)： | 6.2ns |
| 电压电源 - 内部： | 2.5V，3.3V |
| 逻辑元件/逻辑块数目： | 1270 |
| 宏单元数： | 980 |
| 输入/输出数： | 212 |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 256-BGA |
| 供应商设备封装： | 256-FBGA（17x17） |
| 包装： | 托盘 |
| 配用： | 544-2380-ND - KIT DEV MAXII W/EPM 1270N |
| 其它名称： | 544-1337 EPM1270F256C4N-ND |
1–2
Chapter 1: Introduction
Features
Table 1–1 shows the MAX II family features.
f For more information about equivalent macrocells, refer to the MAX II Logic Element to
Macrocell Conversion Methodology white paper.
MAX II and MAX IIG devices are available in three speed grades: –3, –4, and –5, with
–3 being the fastest. Similarly, MAX IIZ devices are available in three speed grades: –6,
–7, and –8, with –6 being the fastest. These speed grades represent the overall relative
performance, not any specific timing parameter. For propagation delay timing
numbers within each speed grade and density, refer to the DC and Switching
Characteristics chapter in the MAX II Device Handbook.
Table 1–2 shows MAX II device speed-grade offerings.
Table 1–1. MAX II Family Features
Feature
EPM240
EPM240G
EPM570
EPM570G
EPM1270
EPM1270G
EPM2210
EPM2210G
EPM240Z
EPM570Z
LEs
240
570
1,270
2,210
240
570
Typical Equivalent Macrocells
192
440
980
1,700
192
440
Equivalent Macrocell Range
128 to 240
240 to 570
570 to 1,270
1,270 to 2,210
128 to 240
240 to 570
UFM Size (bits)
8,192
Maximum User I/O pins
80
160
212
272
80
160
t
PD1 (ns) (1)
4.7
5.4
6.2
7.0
7.5
9.0
f
CNT (MHz) (2)
304
152
t
SU (ns)
1.7
1.2
2.3
2.2
t
CO (ns)
4.3
4.5
4.6
6.5
6.7
Notes to Table 1–1:
(1) tPD1 represents a pin-to-pin delay for the worst case I/O placement with a full diagonal path across the device and combinational logic
implemented in a single LUT and LAB that is adjacent to the output pin.
(2) The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay will run faster than this number.
Table 1–2. MAX II Speed Grades
Device
Speed Grade
–3
–4
–5
–6
–7
–8
EPM240
EPM240G
vv
v
———
EPM570
EPM570G
vv
v
———
EPM1270
EPM1270G
vv
v
———
EPM2210
EPM2210G
vv
v
———
EPM240Z
—
vvv
EPM570Z
———
vvv
相关PDF资料 |
PDF描述 |
|---|---|
| 5-640866-1 | 21CIR MTA156 P/M EDG/CONN LF |
| MAX603ESA+T | IC REG LDO 5V/ADJ .5A 8-SOIC |
| TAJA156K004RNJ | CAP TANT 15UF 4V 10% 1206 |
| TPSE337K010R0100 | CAP TANT 330UF 10V 10% 2917 |
| MAX604ESA+T | IC REG LDO 3.3V/ADJ .5A 8-SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EPM1270F256C4RR | 制造商:Altera Corporation 功能描述:CPLD MAX II Family 980 Macro Cells 247.5MHz 0.18um Technology 2.5V/3.3V 256-Pin FBGA |
| EPM1270F256C5 | 功能描述:CPLD - 复杂可编程逻辑器件 CPLD - MAX II 980 Macro 212 IO RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| EPM1270F256C5ES | 制造商:Altera Corporation 功能描述:Flash Based Complex PLD, 980 Cell, 10.1ns, 256 Pin, Plastic, BGA |
| EPM1270F256C5N | 功能描述:CPLD - 复杂可编程逻辑器件 CPLD - MAX II 980 Macro 212 IO RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| EPM1270F256C5NRR | 制造商:Altera Corporation 功能描述:CPLD MAX II Family 980 Macro Cells 201.1MHz 0.18um Technology 2.5V/3.3V 256-Pin FBGA |
发布紧急采购，3分钟左右您将得到回复。