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参数资料
| 型号： | EPM1270M256C5N |
| 厂商： | Altera |
| 文件页数： | 3/6页 |
| 文件大小： | 0K |
| 描述： | IC MAX II CPLD 1270 LE 256-MBGA |
| 标准包装： | 176 |
| 系列： | MAX® II |
| 可编程类型： | 系统内可编程 |
| 最大延迟时间 tpd(1)： | 6.2ns |
| 电压电源 - 内部： | 2.5V，3.3V |
| 逻辑元件/逻辑块数目： | 1270 |
| 宏单元数： | 980 |
| 输入/输出数： | 212 |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 256-TFBGA |
| 供应商设备封装： | 256-MBGA（11x11） |
| 包装： | 托盘 |
| 配用： | 544-2380-ND - KIT DEV MAXII W/EPM 1270N |
| 其它名称： | 544-1721 |
Chapter 1: Introduction
1–3
Features
MAX II devices are available in space-saving FineLine BGA, Micro FineLine BGA,
and thin quad flat pack (TQFP) packages (refer to Table 1–3 and Table 1–4). MAX II
devices support vertical migration within the same package (for example, you can
migrate between the EPM570, EPM1270, and EPM2210 devices in the 256-pin
FineLine BGA package). Vertical migration means that you can migrate to devices
whose dedicated pins and JTAG pins are the same and power pins are subsets or
supersets for a given package across device densities. The largest density in any
package has the highest number of power pins; you must lay out for the largest
planned density in a package to provide the necessary power pins for migration. For
I/O pin migration across densities, cross reference the available I/O pins using the
device pin-outs for all planned densities of a given package type to identify which
I/O pins can be migrated. The Quartus II software can automatically cross-reference
and place all pins for you when given a device migration list.
Table 1–3. MAX II Packages and User I/O Pins
Device
68-Pin
Micro
FineLine
BGA (1)
100-Pin
Micro
FineLine
BGA (1)
100-Pin
FineLine
BGA
100-Pin
TQFP
144-Pin
TQFP
144-Pin
Micro
FineLine
BGA (1)
256-Pin
Micro
FineLine
BGA (1)
256-Pin
FineLine
BGA
324-Pin
FineLine
BGA
EPM240
EPM240G
—80
80
—
EPM570
EPM570G
—
76
116
—
160
—
EPM1270
EPM1270G
—
116
—
212
—
EPM2210
EPM2210G
—
——
—204
272
EPM240Z
54
80
—
EPM570Z
—
76
—
116
160
—
Note to Table 1–3:
(1) Packages available in lead-free versions only.
Table 1–4. MAX II TQFP, FineLine BGA, and Micro FineLine BGA Package Sizes
Package
68-Pin
Micro
FineLine
BGA
100-Pin
Micro
FineLine
BGA
100-Pin
FineLine
BGA
100-Pin
TQFP
144-Pin
TQFP
144-Pin
Micro
FineLine
BGA
256-Pin
Micro
FineLine
BGA
256-Pin
FineLine
BGA
324-Pin
FineLine
BGA
Pitch (mm)
0.5
1
0.5
1
Area (mm2)
25
36
121
256
484
49
121
289
361
Length × width
(mm × mm)
5 × 5
6 × 6
11 × 11
16 × 16
22 × 22
7 × 7
11 × 11
17 × 17
19 × 19
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EPM1270M256I5N | 功能描述:CPLD - 复杂可编程逻辑器件 CPLD - MAX II 980 Macro 212 IO RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| EPM1270T100A | 制造商:ALTERA 制造商全称:Altera Corporation 功能描述:MAX II Device Family |
| EPM1270T100C | 制造商:ALTERA 制造商全称:Altera Corporation 功能描述:MAX II Device Family |
| EPM1270T100I | 制造商:ALTERA 制造商全称:Altera Corporation 功能描述:MAX II Device Family |
| EPM1270T144A5N | 功能描述:CPLD - 复杂可编程逻辑器件 CPLD - MAX II 980 Macro 116 IO RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
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