参数资料
型号: EPM7128ELC84-12
厂商: Altera
文件页数: 49/66页
文件大小: 0K
描述: IC MAX 7000 CPLD 128 84-PLCC
标准包装: 75
系列: MAX® 7000
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 12.0ns
电压电源 - 内部: 4.75 V ~ 5.25 V
逻辑元件/逻辑块数目: 8
宏单元数: 128
门数: 2500
输入/输出数: 68
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 84-LCC(J 形引线)
供应商设备封装: 84-PLCC(29.31x29.31)
包装: 管件
其它名称: 544-2318-5
Altera Corporation
53
MAX 7000 Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
These values are specified under the recommended operating conditions shown in Table 14. See Figure 13 for more
information on switching waveforms.
(2)
This minimum pulse width for preset and clear applies for both global clear and array controls. The tLPA parameter
must be added to this minimum width if the clear or reset signal incorporates the tLAD parameter into the signal
path.
(3)
This parameter is a guideline that is sample-tested only and is based on extensive device characterization. This
parameter applies for both global and array clocking.
(4)
These parameters are measured with a 16-bit loadable, enabled, up/down counter programmed into each LAB.
(5)
The fMAX values represent the highest frequency for pipelined data.
(6)
Operating conditions: VCCIO = 3.3 V ± 10% for commercial and industrial use.
(7)
For EPM7064S-5, EPM7064S-6, EPM7128S-6, EPM7160S-6, EPM7160S-7, EPM7192S-7, and EPM7256S-7 devices,
these values are specified for a PIA fan-out of one LAB (16 macrocells). For each additional LAB fan-out in these
devices, add an additional 0.1 ns to the PIA timing value.
(8)
The tLPA parameter must be added to the tLAD, tLAC, tIC, tEN, tSEXP, tACL, and tCPPW parameters for macrocells
running in the low-power mode.
Power
Consumption
Supply power (P) versus frequency (fMAX in MHz) for MAX 7000 devices
is calculated with the following equation:
P = PINT + PIO = ICCINT × VCC + PIO
The PIO value, which depends on the device output load characteristics
and switching frequency, can be calculated using the guidelines given in
The ICCINT value, which depends on the switching frequency and the
application logic, is calculated with the following equation:
ICCINT =
A × MCTON + B × (MCDEV – MCTON) + C × MCUSED × fMAX × togLC
The parameters in this equation are shown below:
MCTON
= Number of macrocells with the Turbo Bit option turned on,
as reported in the MAX+PLUS II Report File (.rpt)
MCDEV
= Number of macrocells in the device
MCUSED = Total number of macrocells in the design, as reported
in the MAX+PLUS II Report File (.rpt)
fMAX
= Highest clock frequency to the device
togLC
= Average ratio of logic cells toggling at each clock
(typically 0.125)
A, B, C
= Constants, shown in Table 39
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