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| 型号： | EPM7256AETI144-7N |
| 厂商： | Altera |
| 文件页数： | 24/64页 |
| 文件大小： | 0K |
| 描述： | IC MAX 7000 CPLD 256 144-TQFP |
| 产品变化通告： | Bond Wire Change 4/Sept/2008 |
| 标准包装： | 180 |
| 系列： | MAX® 7000A |
| 可编程类型： | 系统内可编程 |
| 最大延迟时间 tpd(1)： | 7.5ns |
| 电压电源 - 内部： | 3 V ~ 3.6 V |
| 逻辑元件/逻辑块数目： | 16 |
| 宏单元数： | 256 |
| 门数： | 5000 |
| 输入/输出数： | 120 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 144-LQFP |
| 供应商设备封装： | 144-TQFP（20x20） |
| 包装： | 托盘 |
| 其它名称： | 544-2063 EPM7256AETI144-7N-ND |
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30
Altera Corporation
MAX 7000A Programmable Logic Device Data Sheet
Notes to tables:
(1)
(2)
Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents
less than 100 mA and periods shorter than 20 ns.
(3)
For EPM7128A and EPM7256A devices only, VCC must rise monotonically.
(4)
In MAX 7000AE devices, all pins, including dedicated inputs, I/O pins, and JTAG pins, may be driven before
VCCINT and VCCIO are powered.
(5)
These devices support in-system programming for –40° to 100° C. For in-system programming support between
–40° and 0° C, contact Altera Applications.
(6)
These values are specified under the recommended operating conditions shown in Table 14 on page 28.
(7)
The parameter is measured with 50% of the outputs each sourcing the specified current. The IOH parameter refers
to high-level TTL or CMOS output current.
(8)
The parameter is measured with 50% of the outputs each sinking the specified current. The IOL parameter refers to
low-level TTL or CMOS output current.
(9)
This value is specified for normal device operation. For MAX 7000AE devices, the maximum leakage current during
power-up is ±300 A. For EPM7128A and EPM7256A devices, leakage current during power-up is not specified.
(10) For EPM7128A and EPM7256A devices, this pull-up exists while a device is programmed in-system.
(11) For MAX 7000AE devices, this pull-up exists while devices are programmed in-system and in unprogrammed
devices during power-up.
(12) Capacitance is measured at 25 °C and is sample-tested only. The OE1 pin (high-voltage pin during programming)
has a maximum capacitance of 20 pF.
(13) The POR time for MAX 7000AE devices (except MAX 7128A and MAX 7256A devices) does not exceed 100 s. The
sufficient VCCINT voltage level for POR is 3.0 V. The device is fully initialized within the POR time after VCCINT
reaches the sufficient POR voltage level.
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| EPM7256AETI144-7 | IC MAX 7000 CPLD 256 144-TQFP |
相关代理商/技术参数 |
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|---|---|
| EPM7256AFC256-10 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Altera Corporation 功能描述: |
| EPM7256AFC256-12 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| EPM7256AFC256-7 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Altera Corporation 功能描述: |
| EPM7256AFI256-10 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Altera Corporation 功能描述: |
| EPM7256AQC208-10 | 制造商:Altera Corporation 功能描述:COMPLEX-EEPLD, 256-CELL, 10NS PROP DELAY, 208 Pin, Plastic, QFP |
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