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参数资料
| 型号： | EVAL-AD5060EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/24页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD5060 |
| 标准包装： | 1 |
| 系列： | nanoDAC™ |
| DAC 的数量： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 30M |
| 数据接口： | SPI? |
| 设置时间： | 4µs |
| DAC 型： | 电压 |
| 工作温度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD5060 |
AD5040/AD5060
Rev. A | Page 18 of 24
AD5040/AD5060 to MICROWIRE Interface
AD5040/AD5060 to Blackfin ADSP-BF53x Interface
Figure 49 shows an interface between the AD5040/AD5060 and
any MICROWIRE-compatible device. Serial data is shifted out
on the falling edge of the serial clock and is clocked into the
AD5040/AD5060 on the rising edge of the SK.
Figure 47 shows a serial interface between the AD5040/
AD5060 and the Blackfin ADSP-53x microprocessor. The
ADSP-BF53x processor family incorporates two dual-channel
synchronous serial ports, SPORT1 and SPORT0, for serial and
multiprocessor communications. Using SPORT0 to connect to
the AD5040/AD5060, the setup for the interface is: DT0PRI
drives the SDIN pin of the AD5040/AD5060, while TSCLK0
drives the SCLK of the part; the SYNC is driven from TFS0.
MICROWIRE1
1ADDITIONAL PINS OMITTED FOR CLARITY
CS
SK
SO
SYNC
SCLK
DIN
04767-035
AD5040/
AD50601
ADSP-BF53x1
1ADDITIONAL PINS OMITTED FOR CLARITY
DT0PRI
TSCLK0
TFS0
DIN
SCLK
SYNC
04767-033
AD5040/
AD50601
Figure 49. AD5040/AD5060 to MICROWIRE Interface
Figure 47. AD5040/AD5060 to Blackfin ADSP-BF53x Interface
AD5040/AD5060 to 80C51/80L51 Interface
Figure 48 shows a serial interface between the AD5060/
AD5040 and the 80C51/80L51 microcontroller. The setup
for the interface is: TxD of the 80C51/80L51 drives SCLK of
the AD5040/AD5060 while RxD drives the serial data line
of the part. The SYNC signal is again derived from a bit-
programmable pin on the port. In this case, Port Line P3.3 is
used. When data is to be transmitted to the AD5040, P3.3 is
taken low. The 80C51/80L51 transmits data only in 8-bit bytes;
thus only 8 falling clock edges occur in the transmit cycle. To
load data to the DAC, P3.3 is left low after the first eight bits are
transmitted, and a second write cycle is initiated to transmit the
second byte of data. P3.3 is taken high following the completion
of this cycle. The 80C51/80L51 outputs the serial data in a
format which has the LSB first. The AD5040/AD5060 require
data to be received with the MSB as the first bit. The
80C51/80L51 transmit routine should take this into account.
80C51/80L511
1ADDITIONAL PINS OMITTED FOR CLARITY
P3.3
TxD
RxD
SYNC
SCLK
DIN
04767-034
AD5040/
AD50601
Figure 48. AD5040/AD5060 to 80C51/80L51 Interface
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| EVAL-AD5062EB | 制造商:Analog Devices 功能描述:EVAL BD FOR AD506X DAC 14-/16BIT, SERL INPUT - Bulk |
| EVAL-AD5062EBZ | 功能描述:BOARD EVAL FOR AD5062 RoHS:是 类别:编程器，开发系统 >> 评估板 - 数模转换器 (DAC) 系列:nanoDAC™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- DAC 的数量:4 位数:12 采样率（每秒）:- 数据接口:串行，SPI? 设置时间:3µs DAC 型:电流/电压 工作温度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD5063EB | 制造商:Analog Devices 功能描述:Evaluation Board For 14-/16-Bit, Serial Input, Vout NanoDACs 制造商:Analog Devices 功能描述:EVAL BD FOR AD506X DAC 14-/16BIT, SERL INPUT - Bulk |
| EVAL-AD5063EBZ | 功能描述:BOARD EVAL FOR AD5063 RoHS:是 类别:编程器，开发系统 >> 评估板 - 数模转换器 (DAC) 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- DAC 的数量:4 位数:12 采样率（每秒）:- 数据接口:串行，SPI? 设置时间:3µs DAC 型:电流/电压 工作温度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
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