参数资料
型号: EVAL-AD5363EBZ
厂商: Analog Devices Inc
文件页数: 24/29页
文件大小: 0K
描述: BOARD EVALUATION FOR AD5363
产品培训模块: DAC Architectures
标准包装: 1
DAC 的数量: 8
位数: 14
采样率(每秒): 540k
数据接口: 串行
设置时间: 20µs
DAC 型: 电压
工作温度: -40°C ~ 85°C
已供物品: 板,CD
已用 IC / 零件: AD5363
相关产品: AD5363BSTZ-REEL-ND - IC DAC 14BIT 8CH SERIAL 52-LQFP
AD5363BSTZ-ND - IC DAC 14BIT 8CH SERIAL 52-LQFP
AD5363BCPZ-REEL7-ND - IC DAC 14BIT 8CH SERIAL 56-LFCSP
AD5363BCPZ-ND - IC DAC 14BIT 8CH SERIAL 56-LFCSP
AD5362/AD5363
Rev. A | Page 3 of
28
GENERAL DESCRIPTION
The AD5362/AD5363 contain eight 16-/14-bit DACs in a single
52-lead LQFP package or 56-lead LFCSP package. The devices
provide buffered voltage outputs with a span of 4× the reference
voltage. The gain and offset of each DAC can be independently
trimmed to remove errors. For even greater flexibility, the device
is divided into two groups of four DACs, and the output range
of each group can be independently adjusted by an offset DAC.
The AD5362/AD5363 offer guaranteed operation over a wide
supply range with VSS from 16.5 V to 4.5 V and VDD from 8 V
to 16.5 V. The output amplifier headroom requirement is 1.4 V,
operating with a load current of 1 mA.
The AD5362/AD5363 have a high speed 4-wire serial interface
that is compatible with SPI, QSPI, MICROWIRE, and DSP
interface standards and can handle clock speeds of up to
50 MHz. All the outputs can be updated simultaneously by
taking the LDAC input low. Each channel has a programmable
gain and an offset adjust register.
Each DAC output is gained and buffered on chip with respect
to an external SIGGNDx input. The DAC outputs can also be
switched to SIGGNDx via the CLR pin.
Table 1. High Channel Count Bipolar DACs
Model
Resolution (Bits)
Nominal Output Span
Output Channels
Linearity Error (LSB)
16
4 × VREF (20 V)
16
±4
14
4 × VREF (20 V)
16
±1
AD5362
16
4 × VREF (20 V)
8
±4
AD5363
14
4 × VREF (20 V)
8
±1
16
4 × VREF (12 V)
40
±4
14
4 × VREF (12 V)
40
±1
16
4 × VREF (12 V)
32
±4
14
4 × VREF (12 V)
32
±1
14
±8.75 V
32
±3
14
±8.75 V
40
±3
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