
AD5450/AD5451/AD5452/AD5453
Data Sheet
Rev. G | Page 16 of 28
GENERAL DESCRIPTION
DAC SECTION
current output DACs, respectively, consisting of a segmented
(4-bit) inverting R-2R ladder configuration. A simplified
2R
S1
2R
S2
2R
S3
2R
S12
2R
DAC DATA LATCHES
AND DRIVERS
R
RFB
IOUT1
VREF
04587-060
R
AGND
The feedback resistor, RFB, has a value of R. The value of R is
typically 9 k (with a minimum value of 7 k and a maximum
value of 11 k). If IOUT1 is kept at the same potential as GND, a
constant current flows in each ladder leg, regardless of digital
input code. Therefore, the input resistance presented at VREF is
always constant and nominally of value R. The DAC output
(IOUT1) is code-dependent, producing various resistances and
capacitances. When choosing the external amplifier, take into
account the variation in impedance generated by the DAC on
the amplifier’s inverting input node.
Access is provided to the VREF, RFB, and IOUT1 terminals of the
DAC, making the device extremely versatile and allowing it to be
configured in several operating modes; for example, it can provide
a unipolar output or can provide 4-quadrant multiplication in
bipolar mode. Note that a matching switch is used in series with
the internal RFB feedback resistor. If users attempt to measure
RFB, power must be applied to VDDto achieve continuity.
CIRCUIT OPERATION
Unipolar Mode
Using a single op amp, these devices can easily be configured to
provide a 2-quadrant multiplying operation or a unipolar output
voltage swing, as shown i
n Figure 44. When an output amplifier
is connected in unipolar mode, the output voltage is given by
REF
n
OUT
V
D
V
×
=
2
where:
D is the fractional representation of the digital word loaded to
the DAC.
D = 0 to 255 (8-bit AD5450).
= 0 to 1023 (10-bit AD5451).
= 0 to 4095 (12-bit AD5452).
= 0 to 16,383 (14-bit AD5453).
n is the number of bits.
Note that the output voltage polarity is opposite to the VREF
polarity for dc reference voltages.
04587-
009
RFB
IOUT1
GND
SCLK SDIN
VREF
R1
SYNC
AD5450/
AD5451/
AD5452/
AD5453
VDD
AGND
C1
A1
R2
VOUT = 0 TO –VREF
CONTROLLER
NOTES
1. R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
Figure 44. Unipolar Mode Operation
These DACs are designed to operate with either negative or
positive reference voltages. The VDD power pin is only used by
the internal digital logic to drive the on and off states of the
DAC switches.
These DACs are designed to accommodate ac reference input
signals in the range of 10 V to +10 V.
With a fixed 10 V reference, the circuit shown in
Figure 44 gives
a unipolar 0 V to 10 V output voltage swing. When VIN is an ac
signal, the circuit performs 2-quadrant multiplication.
Table 5 shows the relationship between the digital code and
the expected output voltage for a unipolar operation using the
Table 5. Unipolar Code Table for the AD5450 Digital Input
Analog Output (V)
1111 1111
VREF (255/256)
1000 0000
VREF (128/256) = VREF/2
0000 0001
VREF (1/256)
0000 0000
VREF (0/256) = 0