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参数资料
| 型号： | EVAL-AD7274CBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/16页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD7274 |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 3M |
| 数据接口： | 串行 |
| 输入范围： | 0 ~ 3.6 V |
| 在以下条件下的电源（标准）： | 11.4mW @ 3 V |
| 工作温度： | -40°C ~ 125°C |
| 已用 IC / 零件： | AD7274 |
| 已供物品： | 板，CD |
EVAL-AD7273/AD7274
LINK AND SWITCH OPTIONS
There are 14 link options that must be set for the required operating setup before using the evaluation board. The functions of these
Table 2. Link Option Functions
Link No.
LK1
LK2
LK3
LK4
LK5
LK6
LK7
LK8
LK9
LK10
LK11
LK12
LK13
LK14
Function
This link option is used to select a 50 Ω termination on the analog input buffer circuit, the AIN socket.
When this link is inserted, the 50 Ω termination is applied.
When this link is removed, the 50 Ω termination is removed.
This link option controls the program pin of the AD780 voltage reference.
When this link is inserted, the AD780 output voltage is set to +3 V.
When this link is removed, the AD780 output voltage is set to +2.5 V.
This link option is used to select a 50 Ω termination on the input of the bias-up circuit, the VIN socket.
When this link is inserted, the 50 Ω termination is applied.
When this link is removed, the 50 Ω termination is removed.
This link option is used to select the reference voltage for AD7273/AD7274.
When this link is in Position A, the AD780 supplies the V REF voltage for the AD7273/AD7274.
When this link is in Position B, the REF195 supplies the V REF voltage for the AD7273/AD7274.
When this link is in Position C, V REF is supplied externally via J10.
This link option sets the dc bias voltage that is applied to the optional bias-up circuit.
When this link is in Position A, the bias voltage is set to the same level as the voltage that is applied to the AD7273/AD7274
VDD pin. In this configuration, a bipolar analog input applied to the VIN SMB socket is biased up by the bias circuit and is
presented at the VBIASED SMB as an unipolar signal biased around VDD/2.
When this link is in Position B, the bias voltage is set to AGND. In this configuration, the bias-up circuit is not used.
This link option is used to select the source of the +12 V supply.
In Position A, the +12 V is supplied from the EVAL-CONTROL-BRD2 through the 96-way connector.
In Position B, the +12 V is supplied from an external source through the power connector, J6.
This link option is used to select the source of the ?12 V supply.
In Position A, the ?12 V is supplied from the EVAL-CONTROL-BRD2 through the 96-way connector.
In Position B, the ?12 V is supplied from an external source through the power connector, J6.
This link controls the transfer of data from the AD7273/AD7274 during a conversion for various frequencies of SCLK.
These links should be in Position A for slower SCLK frequencies, giving valid data on the rising edge.
These links should be in Position B for fast SCLK frequencies, giving valid data on the falling edge.
This link selects the source of the VCC +5 V supply for the 74LS04.
When this link is in Position A, VCC power is supplied from the same power source supplying the AD7273/AD7274 V DD pin.
When this link is in Position B, VCC power must be supplied from an external source via the power connector, J5.
This link option is used to connect the input of the V IN analog buffer to the AIN input socket or to AGND.
When this link is in Position A, the AIN socket is tied to the input of the V IN buffer. In this configuration, an analog signal
applied to the AIN input socket is buffered and presented at the AD7273/AD7274 V IN input.
When this link is in Position B, the V IN buffer input is tied to AGND.
This link selects the source of the VDD supplied to the AD7273/AD7274.
When this link is in Position A, the VDD must be supplied from an external source via J5.
When this link is in Position B, the VDD is supplied from the EVAL-CONTROL-BRD2.
When this link is in Position C, t he VDD is supplied from one of the voltage references, the AD780 or the REF195.
This link selects the source of the CS input to the ADC.
In Position A, CS is supplied by the EVAL-CONTROL-BRD2.
In Position B, CS must be supplied from an external source via P12.
This link selects the source of the SDATA input to the ADC.
In Position A, SDATA is supplied by the EVAL-CONTROL-BRD2.
In Position B, SDATA must be supplied from an external source via P12.
This link selects the source of the SCLK input to the ADC.
In Position A, SCLK is supplied by the EVAL-CONTROL-BRD2.
In Position B, SCLK must be supplied from an external source via P12.
Rev. 0 | Page 4 of 16
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