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参数资料
| 型号： | EVAL-AD7484CBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 1/20页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD7484 |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 14 |
| 采样率（每秒）： | 3M |
| 数据接口： | 并联 |
| 输入范围： | 0 ~ 2.5 V |
| 在以下条件下的电源（标准）： | 90mW @ 3MSPS |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7484 |
| 已供物品： | 板，CD |
| 相关产品： | AD7484BSTZ-ND - IC ADC 14BIT SAR 3MSPS 48-LQFP |
3 MSPS, 14-Bit SAR ADC
AD7484
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2002–2009 Analog Devices, Inc. All rights reserved.
FEATURES
Fast throughput rate: 3 MSPS
Wide input bandwidth: 40 MHz
No pipeline delays with SAR ADC
Excellent dc accuracy performance
2 parallel interface modes
Low power: 90 mW (full power) and 2.5 mW (nap mode)
Standby mode: 2 μA maximum
Single 5 V supply operation
Internal 2.5 V reference
Full-scale overrange mode (using 15th bit)
System offset removal via user access offset register
Nominal 0 V to 2.5 V input with shifted range capability
Pin compatible upgrade of 12-bit AD7482
FUNCTIONAL BLOCK DIAGRAM
2.5V
REFERENCE
NAP
MODE2
BUF
T/H
AVDD AGND CBIAS DVDD
DGND
REFSEL
REFOUT
REFIN
VIN
14-BIT
ALGORITHMIC
SAR
CS
RD
MODE1
CLIP
D0
STBY
D1
RESET
D2
D3
CONVST
D4
D14
D5
D13
D6
D12
D11
D10
D9
D8
CONTROL
LOGIC AND I/O
REGISTERS
D7
AD7484
VDRIVE
WR
IT
E
BU
S
Y
02
64
2-
00
1
Figure 1.
GENERAL DESCRIPTION
The AD7484 is a 14-bit, high speed, low power, successive
approximation ADC. The part features a parallel interface with
throughput rates up to 3 MSPS. The part contains a low noise,
wide bandwidth track-and-hold that can handle input frequencies
in excess of 40 MHz.
The conversion process is a proprietary algorithmic successive
approximation technique that results in no pipeline delays. The
input signal is sampled, and a conversion is initiated on the falling
edge of the CONVST signal. The conversion process is controlled
by an internally trimmed oscillator. Interfacing is via standard
parallel signal lines, making the part directly compatible with
microcontrollers and DSPs.
The AD7484 provides excellent ac and dc performance specifica-
tions. Factory trimming ensures high dc accuracy, resulting in
very low INL, offset, and gain errors.
The part uses advanced design techniques to achieve very low
power dissipation at high throughput rates. Power consumption
in the normal mode of operation is 90 mW. There are two power
saving modes: a nap mode, which keeps the reference circuitry
alive for a quick power-up while consuming 2.5 mW, and a
standby mode that reduces power consumption to a mere 10 μW.
The AD7484 features an on-board 2.5 V reference but can also
accommodate an externally provided 2.5 V reference source.
The nominal analog input range is 0 V to 2.5 V, but an offset
shift capability allows this nominal range to be offset by ±200 mV.
This allows the user considerable flexibility in setting the bottom
end reference point of the signal range, a useful feature when
using single-supply op amps.
The AD7484 also provides an 8% overrange capability via a
15th bit. Therefore, if the analog input range strays outside the
nominal range by up to 8%, the user can still accurately resolve
the signal by using the 15th bit.
The AD7484 is powered by a 4.75 V to 5.25 V supply. The part
also provides a VDRIVE pin that allows the user to set the voltage
levels for the digital interface lines. The range for this VDRIVE pin
is 2.7 V to 5.25 V. The part is housed in a 48-lead LQFP package
and is specified over a 40°C to +85°C temperature range.
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