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参数资料
| 型号： | EVAL-AD7609EDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 21/36页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD7609 |
| 标准包装： | 1 |
| ADC 的数量： | 8 |
| 位数： | 18 |
| 采样率（每秒）： | 200k |
| 数据接口： | DSP，MICROWIRE?，并联，QSPI?，串行，SPI? |
| 输入范围： | ±10 V |
| 在以下条件下的电源（标准）： | 100mW @ 200kSPS |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7609 |
| 已供物品： | 板 |
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AD7609
Data Sheet
Rev. A | Page 28 of 36
DIGITAL FILTER
The AD7609 contains an optional digital filter. This digital filter
is a first-order sinc filter. This digital filter should be used in
applications where slower throughput rates are used or where
higher signal-to-noise ratio or dynamic range is desirable. The
oversampling ratio of the digital filter is controlled using the
oversampling pins, OS [2:0] (see Table 9). OS 2 is the MSB
control bit and OS 0 is the LSB control bit. Table 9 provides
the oversampling bit decoding to select the different oversample
rates. The OS pins are latched on the falling edge of BUSY.
This sets the oversampling rate for the next conversion (see
Figure 45). In addition to the oversampling function, the output
result is decimated to 18-bit resolution.
If the OS pins are set to select an OS ratio of 8, the next
CONVST x rising edge takes the first sample for each channel
and the remaining seven samples for all channels are taken with
an internally generated sampling signal. These samples are then
averaged to yield an improvement in SNR performance. Table 9
shows typical SNR performance for both the ±10 V and the
±5 V ranges. As Table 9 indicates, there is an improvement in
SNR as the OS ratio increases. As the OS ratio increases, the
3 dB frequency is reduced and the allowed sampling frequency
is also reduced. In an application where the required sampling
frequency is 10 kSPS, an OS ratio of up to 16 can be used. In
this case, the application sees an improvement in SNR but the
input 3 dB bandwidth is limited to ~6 kHz.
The CONVST A and CONVST B pins must be tied/driven
together when oversampling is turned on. When the over-
sampling function is turned on, the BUSY high time for the
conversion process extends. The actual BUSY high time
depends on the oversampling rate selected; the higher the
oversampling rate, the longer the BUSY high, or total
conversion time, see Table 9.
Figure 46 shows that the conversion time extends as the over-
sampling rate is increased, and the BUSY signal lengthens for the
different oversampling rates. For example, a sampling frequency
of 10 kSPS yields a cycle time of 100 s. Figure 46 shows OS × 2
and OS × 4; for a 10 kSPS example, there is adequate cycle time
to further increase the oversampling rate and yield greater
improvements in SNR performance. In an application where
the initial sampling or throughput rate is at 200 kSPS, for
example, and oversampling is turned on, the throughput rate
must be reduced to accommodate the longer conversion time
and to allow for the read. To achieve the fastest throughput
rate possible when oversampling is turned on, the read can be
performed during the BUSY high time. The falling edge of BUSY
is used to update the output data registers with the new conver-
sion data; therefore, the reading of conversion data should not
occur on this edge. Figure 47 to Figure 53 illustrate the effect of
oversampling on the code spread in a dc histogram plot. As the
oversample rate is increased, the spread of codes is reduced. (In
rate was scaled with OS ratio.)
CONVST A,
CONVST B
BUSY
OS x
tOS_SETUP
tOS_HOLD
CONVERSION N
CONVERSION N + 1
OVERSAMPLE RATE
LATCHED FOR CONVERSION N + 1
09760-
042
Figure 45. OS Pin Timing
Table 9. Oversampling Bit Decoding (100 Hz Input Signal)
OS
[2:0]
OS
Ratio
SNR ±5 V Range
(dB)
SNR ±10 V Range
(dB)
3 dB BW 5 V Range
(kHz)
3 dB BW 10 V
Range (kHz)
Maximum Throughput
CONVST x Frequency (kHz)
000
No OS
90.8
91.5
22
33
200
001
2
93.3
93.9
22
28.9
100
010
4
95.5
96.4
18.5
21.5
50
011
8
98
98.9
11.9
12
25
100
16
100.6
101
6
12.5
101
32
101.8
102
3
6.25
110
64
102.7
102.9
1.5
3.125
111
Invalid
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