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| 型号： | EVAL-AD7762EDZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 1/29页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL CONTROL AD7762 |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 625k |
| 数据接口： | 并联 |
| 输入范围： | ±3.25 Vpp |
| 在以下条件下的电源（标准）： | 958mW @ 625kSPS |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7762 |
| 已供物品： | 板，CD |
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625 kSPS, 24-Bit, 109 dB Sigma-Delta ADC
With On-Chip Buffer
Data Sheet
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2005–2014 Analog Devices, Inc. All rights reserved.
FEATURES
120 dB dynamic range at 78 kHz output data rate
109 dB dynamic range at 625 kHz output data rate
112 dB SNR at 78 kHz output data rate
106 dB SNR at 625 kHz output data rate
625 kHz maximum fully filtered output word rate
Programmable over-sampling rate (32× to 256×)
Fully differential modulator input
On-chip differential amplifier for signal buffering
Low-pass finite impulse response (FIR) filter with default or
user-programmable coefficients
Overrange alert bit
Digital offset and gain correction registers
Filter bypass modes
Low power and power-down modes
Synchronization of multiple devices via SYNC pin
APPLICATIONS
Data acquisition systems
Vibration analysis
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
05477-001
AD7762
VIN+
VIN–
AVDD1
AGND
MCLK
DGND
VDRIVE
AVDD2
AVDD3
AVDD4
DVDD
DECAPA/B
RBIAS
SYNC
RESET
DB0 TO DB15
CS
DRDY
RD/WR
CONTROL LOGIC
I/O
OFFSET AND GAIN
REGISTERS
DIFF
MULTIBIT
Σ-
MODULATOR
RECONSTRUCTION
VREF+
FIR FILTER
ENGINE
PROGRAMMABLE
DECIMATION
BUF
Figure 1.
GENERAL DESCRIPTION
The AD7762 is a high performance, 24-bit Σ-Δ analog-to-
digital converter (ADC). It combines wide input bandwidth
and high speed with the benefits of Σ-Δ conversion with a
performance of 106 dB SNR at 625 kSPS, making it ideal for
high speed data acquisition. Wide dynamic range combined
with significantly reduced antialiasing requirements simplify
the design process. An integrated buffer to drive the reference,
a differential amplifier for signal buffering and level shifting, an
overrange flag, internal gain and offset registers, and a low-pass
digital FIR filter make the AD7762 a compact, highly integrated
data acquisition device requiring minimal peripheral com-
ponent selection. In addition, the device offers programmable
decimation rates, and the digital FIR filter can be adjusted if
the default characteristics are not appropriate to the application.
The AD7762 is ideal for applications demanding high SNR
without a complex front end signal processing design.
The differential input is sampled at up to 40 MSPS by an analog
modulator. The modulator output is processed by a series of low-
pass filters, the final filter having default or user-programmable
coefficients. The sample rate, filter corner frequencies, and output
word rate are set by a combination of the external clock frequency
and the configuration registers of the AD7762.
The reference voltage supplied to the AD7762 determines the
analog input range. With a 4 V reference, the analog input range
is ±3.2 V differential biased around a common mode of 2 V.
This common-mode biasing can be achieved using the on-chip
differential amplifier, further reducing the external signal
conditioning requirements.
The AD7762 is available in an exposed paddle, 64-lead TQFP
and is specified over the industrial temperature range from
40°C to +85°C.
Table 1. Related Devices
Part No.
Description
24-bit, 2.5 MSPS, 100 dB Σ-Δ, parallel interface
24-bit, 625 kSPS, 109 dB Σ-Δ, serial interface
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