参数资料
型号: EVAL-AD9834SDZ
厂商: Analog Devices Inc
文件页数: 6/16页
文件大小: 0K
描述: BOARD EVAL FOR AD9834
产品培训模块: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
标准包装: 1
主要目的: 计时,直接数字合成(DDS)
嵌入式:
已用 IC / 零件: AD9834
次要属性: 75MHz 2.3 V ~ 5.5 V 图形用户界面
已供物品:
UG-266
SELECT EXTERNAL MCLK FREQUENCY
Having selected the digital interface specifics, next use the
EXTERNAL MCLK box to choose which frequency to use. The
boards are supplied with a 75 MHz general oscillator. If a different
clock source is required, the CLK1 SMB connector can be used
to supply a different MCLK value.
Two options for the general oscillator include the AEL3013
oscillators from AEL Crystals and the SG-310SCN oscillators
from Epson Electronics.
Figure 6. EXTERNAL MCLK Input
PROGRAMMING METHOD: HARDWARE OR
SOFTWARE
Functions that select frequency and phase registers, reset internal
registers, and power down the DAC can be implemented using
either software or hardware. Figure 7 shows how to select the
source of control for these functions. PIN/SW = 1 implies that
the functions are being controlled using the appropriate
hardware control pins. PIN/SW = 0 implies that the functions
are being controlled using the appropriate software control bits.
Figure 7. Programming method
LOADING FREQUENCY AND PHASE REGISTERS
The desired output frequency and output phase can be loaded
using the inputs shown in Figure 8. Either the FREQ 0 register or
the FREQ 1 register can be loaded with frequency data. The
frequency data is loaded in megahertz, and the equivalent hex
code is shown to the right once data is entered; click Enter to load
the data. Once data is loaded, the output will appear on the IOUT
and IOUTB pins. Similarly, either the PHASE 0 register or the
Evaluation Board User Guide
The analog output frequency from the AD9834 is defined by
f MCLK /2 28 × FREQREG
where FREQREG is the value loaded into the selected frequency
register in decimals. This signal is phase shifted by
2π/4096 × PHASEREG
where PHASEREG is the value contained in the selected phase
register in decimals.
Figure 8. Frequency and Phase Load
FSK AND PSK FUNCTIONALITY
In software mode, the AD9834 can be setup for FSK or PSK
functionality by simply entering the bit rate in milliseconds and
selecting the push-button option (see Figure 9).
Figure 9. FSK and PSK Functionality
WAVEFORM OPTIONS
The output waveform can be selected as a sinusoidal waveform
or a ramp waveform. The internal comparator in the AD9834
can be disabled or enabled (see Figure 10). The MSB or the
MSB/2 of the phase accumulator can be selected as the output
on the SIGN BIT OUT pin.
Figure 10. Waveform Profile and SIGN BIT OUT
PHASE 1 register can be selected, and the phase data is loaded
in degrees.
Rev. A | Page 6 of 16
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