参数资料
| 型号： | EVAL-ADM1171EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 5/16页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADM1171 |
| 产品培训模块： | Hot Swap Design |
| 标准包装： | 1 |
| 主要目的： | 电源管理，热交换控制器 |
| 已用 IC / 零件： | ADM1171 |
| 已供物品： | 板 |
| 相关产品： | ADM1171-2AUJZ-RL7DKR-ND - IC CTRLR HOTSWAP 16.5V TSOT-23-8 ADM1171-1AUJZ-RL7DKR-ND - IC CTRLR HOTSWAP 16.5V TSOT-23-8 ADM1171-2AUJZ-RL7CT-ND - IC CTRLR HOTSWAP 16.5V TSOT-23-8 ADM1171-1AUJZ-RL7CT-ND - IC CTRLR HOTSWAP 16.5V TSOT-23-8 ADM1171-2AUJZ-RL7TR-ND - IC CTRLR HOTSWAP 16.5V TSOT-23-8 ADM1171-1AUJZ-RL7TR-ND - IC CTRLR HOTSWAP 16.5V TSOT-23-8 |
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADM1171-1AUJ
ADM1171-2AUJ
ADM1171
TIMER 1
8
V CC
TIMER 1
8
V CC
GND 2
TOP VIEW
7
SENSE
GND 2
TOP VIEW
7
SENSE
SS 3 (Not to Scale) 6 CSOUT
SS 3 (Not to Scale) 6 CSOUT
ON 4
5
GATE
ON-CLR 4
5
GATE
Figure 2. Pin Configuration, 1AUJ Model
Table 4. Pin Function Descriptions
Figure 3. Pin Configuration, 2AUJ Model
Pin No.
1
2
3
4
5
6
7
8
Mnemonic
TIMER
GND
SS
ON (ON-CLR)
GATE
CSOUT
SENSE
V CC
Description
Timer Input Pin. The initial and circuit breaker timing cycles are set by this external capacitor. The initial timing
delay is 272.9 ms/μF, and 21.7 ms/μF for a circuit breaker delay. When the TIMER pin is pulled beyond the upper
threshold, the GATE turns off.
Chip Ground Pin.
Soft Start Pin. An external capacitor between the SS pin and GND sets the ramp rate of the current limit
reference.
Input Pin. The ON (ON-CLR) pin is an input to a comparator that has a low-to-high threshold of 1.3 V with 80 mV
hysteresis and a glitch filter. The ADM1171 is reset when the ON (ON-CLR) pin is low. When the ON (ON-CLR) pin is
high, the ADM1171 is enabled. A rising edge on this pin has the added function of clearing a fault and restarting
Gate Output Pin. An internal charge pump provides a 12 μA pull-up current to drive the gate of an N-channel
MOSFET. In an overcurrent condition, the ADM1171 controls the external FET to maintain a constant load
current.
Current Sense Output. The voltage on this pin represents the differential voltage across the V CC and SENSE pins
gained up by a factor of 20.
Current Limit Sense Input Pin. The current limit is set via a sense resistor between the V CC and SENSE pin. In an
overcurrent condition, the gate of the FET is controlled to maintain the SENSE voltage at 50 mV. When this limit is
reached, the TIMER circuit breaker mode is activated. The circuit breaker limit can be disabled by connecting the
V CC pin and SENSE pin together.
Positive Supply Input Pin. The ADM1171 operates between 2.7 V to 16.5 V. An undervoltage lockout (UVLO)
circuit with a glitch filter resets the ADM1171whenthesupplyvoltagedropsbelowthespecifiedUVLOlimit.
Rev. A | Page 5 of 16
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| EVAL-ADM1178EBZ | 功能描述:BOARD EVALUATION FOR ADM1178 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:- 标准包装:1 系列:- 主要目的:电信，线路接口单元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要属性:T1/J1/E1 LIU 次要属性:- 已供物品:板，电源，线缆，CD 其它名称:82EBV2081 |
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