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| 型号： | EVAL-ADM1184EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 9/12页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADM1184 |
| 产品培训模块： | Voltage Supervisor 101 |
| 标准包装： | 1 |
| 主要目的： | 电源管理，电源监控器/跟踪器/序列发生器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADM1184 |
| 主要属性： | 4 输入，3 开漏极启用输出 |
| 次要属性： | 开漏极电源正常输出 |
| 已供物品： | 板 |
ADM1184
THEORY OF OPERATION
The ADM1184 is an integrated, 4-channel voltage-monitoring
device. A 2.7 V to 5.5 V power supply is required on the VCC pin
to power the device.
V CC = 2.7V TO 5.5V
OUTPUT CONFIGURATION
The ADM1184 has four open-drain, active high outputs. Of
these outputs, OUT1 to OUT3 can be used to enable power
supplies, and PWRGD is a common power-good output.
3.3V
2.5V
1.8V
1.2V
VCC
ADM1184
VIN1 OUT1
Output OUT1 to Output OUT3 are dependent on their associated
input (that is, VIN1, VIN2, or VIN3). Before the voltage on a
VINx input reaches 0.6 V, the corresponding output is switched
VIN2
VIN3
VIN4
GND
OUT2
OUT3
PWRGD
ENABLE
SIGNALS
to ground if there is 1 V on the VCC pin of the ADM1184. When
VINx detects 0.6 V, OUTx is asserted after a 30 μs (typical) delay.
When all four monitored supplies exceed 0.6 V, a system power-
good signal (PWRGD) is asserted. There is an internal 190 ms
POWER
GOOD
Figure 16. Typical Applications Circuit
INPUT CONFIGURATION
Four precision comparators monitor four voltage rails.
Each comparator has a 0.6 V reference with a worst-case
accuracy of 0.8%. Resistor networks external to the VIN1,
VIN2, VIN3, and VIN4 pins set the trip points for the
monitored supply rails.
(typical) delay associated with the assertion of the PWRGD
output. After PWRGD is asserted, if any of the four monitored
supplies drops below its programmed threshold, the corresponding
OUTx output and the PWRGD output are deasserted. If only
the supply monitored by VIN4 drops below its programmed
threshold, just the PWRGD output is deasserted.
The ADM1184 functional truth table is shown in Table 5. Note that
the functional operation described in Table 5 applies to the
operation both before and after the assertion of PWRGD.
Typically, the threshold voltage at each of the four adjustable
inputs (that is, VIN1, VIN2, VIN3, and VIN4) is 0.6 V. To
monitor a voltage greater than 0.6 V, connect a resistor divider
Table 5. Functional Truth Table
VIN1 VIN2 VIN3 VIN4 OUT1
0 1 0 0 0 Low
0 0 0 1 2 Low
OUT2
Low
Low
OUT3
Low
Low
PWRGD
Low
Low
V
3.3V
2.9V
0
0
0
0
0
0
1
1
1
1
0
0
0
1
0
1
Low
Low
Low
Low
Low
Low
High
High
High
High
Low
Low
Low
Low
Low
Low
0V
2.9V SUPPLY
GIVES 0.6V
AT VIN1 PIN
t
4.6k ?
VIN1
1.2k ?
0.6V
ADM1184
TO LOGIC
CORE
0
0
1
1
1
1
0
0
1
1
0
0
0
1
0
1
Low
Low
High
High
High
High
Low
Low
High
High
Low
Low
Low
Low
Low
Low
1
0
1
0
High
Low
High
Low
Figure 17. Setting the Undervoltage Threshold
In this example, the VIN1 pin monitors a 3.3 V supply. An
external resistor divider scales this voltage down for monitoring
at the VIN1 pin. The resistor ratio is chosen so that the VIN1
voltage is 0.6 V when the main voltage rises to the preferred level
1
1
1
1
1
0
1
1
1
1
1
0
0
1
1
1
0
1
0
1
High
High
High
High
High
Low
High
High
High
High
High
Low
Low
High
High
Low
Low
Low
Low
High
<V TH = 0.
>V TH = 1.
at startup (a voltage below the nominal 3.3 V level). R1 is 4.6 kΩ
and R2 is 1.2 kΩ; therefore, a voltage level of 2.9 V corresponds
to 0.6 V on the noninverting input of the first comparator (see
Figure 17).
1
2
behavior of the ADM1184.
Rev. 0 | Page 9 of 12
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