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| 型号： | EVAL-ADUC842QSZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 55/88页 |
| 文件大小： | 0K |
| 描述： | KIT DEV QUICK START ADUC842 |
| 标准包装： | 1 |
| 系列： | QuickStart™ 套件 |
| 类型： | MCU |
| 适用于相关产品： | ADuC824 |
| 所含物品： | 评估板、电源、缆线、软件和说明文档 |
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ADuC841/ADuC842/ADuC843
Rev. 0 | Page 59 of 88
MOSI is shared with P3.3 and, as such, has the same
configuration as the one shown in Figure 61.
MCO
I2C M
Q3
Q4
SCLOCK
PIN
Q2
Q1
(OFF)
DVDD
50ns GLITCH
REJECTION FILTER
SPE = 0 (I2C ENABLE)
HARDWARE I2C
(SLAVE ONLY)
SFR
BITS
03260-0-062
Figure 63. SCLOCK Pin I/O Functional Equivalent in I2C Mode
Q3
Q1
Q2 (OFF)
DVDD
Q4 (OFF)
SDATA/
MOSI
PIN
SPE = 1 (SPI ENABLE)
HARDWARE SPI
(MASTER/SLAVE)
03260-0-097
Figure 64. SDATA/MOSI Pin I/O Functional Equivalent in SPI Mode
Q3
Q4
Q2
Q1
DVDD
MCO
SDATA/
MOSI
PIN
(OFF)
50ns GLITCH
REJECTION FILTER
SPE = 0 (I2C ENABLE)
HARDWARE I2C
(SLAVE ONLY)
SFR
BITS
MCI
MDE
I2C M
03260-0-063
Figure 65. SDATA/MOSI Pin I/O Functional Equivalent in I2C Mode
Read-Modify-Write Instructions
Some 8051 instructions that read a port read the latch while
others read the pin. The instructions that read the latch rather
than the pins are the ones that read a value, possibly change it,
and then rewrite it to the latch. These are called read-modify-
write instructions, which are listed below. When the destination
operand is a port or a port bit, these instructions read the latch
rather than the pin.
Table 27. Read-Write-Modify Instructions
Instruction
Description
ANL
Logical AND, e.g., ANL P1, A
ORL
(Logical OR, e.g., ORL P2, A
XRL
(Logical EX-OR, e.g., XRL P3, A
JBC
Jump if Bit = 1 and clear bit, e.g., JBC P1.1,
LABEL
CPL
Complement bit, e.g., CPL P3.0
INC
Increment, e.g., INC P2
DEC
Decrement, e.g., DEC P2
DJNZ
Decrement and Jump if Not Zero, e.g., DJNZ
P3, LABEL
MOV PX.Y, C1
Move Carry to Bit Y of Port X
CLR PX.Y1
Clear Bit Y of Port X
SETB PX.Y1
Set Bit Y of Port X
1 These instructions read the port byte (all 8 bits), modify the addressed bit,
and then write the new byte back to the latch.
Read-modify-write instructions are directed to the latch rather
than to the pin to avoid a possible misinterpretation of the
voltage level of a pin. For example, a port pin might be used to
drive the base of a transistor. When 1 is written to the bit, the
transistor is turned on. If the CPU then reads the same port bit
at the pin rather than the latch, it reads the base voltage of the
transistor and interprets it as a Logic 0. Reading the latch rather
than the pin returns the correct value of 1.
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| EVAL-ADUC845QS | 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Bulk |
| EVAL-ADUC845QSP | 制造商:Analog Devices 功能描述:MICROCONVERTER?, 1-CYCLE 8052 MCU + 10-CHANNEL, DUAL 24-BIT - Bulk |
| EVAL-ADUC845QSPZ | 功能描述:KIT DEV QUICK START ADUC845 RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ PLUS 套件 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| EVAL-ADUC845QSZ | 功能描述:KIT DEV FOR ADUC845 QUICK START RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ 套件 标准包装:1 系列:PICDEM™ 类型:MCU 适用于相关产品:PIC10F206，PIC16F690，PIC16F819 所含物品:板，线缆，元件，CD，PICkit 编程器 产品目录页面:659 (CN2011-ZH PDF) |
| EVAL-ADUC846QS | 制造商:AD 制造商全称:Analog Devices 功能描述:MicroConverter, Dual 16-Bit ADCs with Embedded 62kB FLASH MCU |
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