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参数资料
| 型号： | EVAL.BH1721FVC |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 14/18页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR BH1721FVC |
| 特色产品： | Ambient Light Sensor ICs |
| 标准包装： | 1 |
| 传感器类型： | 环境光 |
| 接口： | I²C |
| 灵敏度： | 560nm |
| 电源电压： | 2.4 V ~ 3.6 V |
| 嵌入式： | 否 |
| 已供物品： | 2 板，CD |
| 已用 IC / 零件： | BH1721 |
BH1721FVC
Technical Note
● Notes for use
1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage ( Vmax ), temperature range of operating conditions
(Topr), etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open
circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take
physical safety measures including the use of fuses, etc.
2) GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric
transient.
3) Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can
break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between
the terminal and the power supply or the GND terminal, the ICs can break down.
4) Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
5) Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress.
Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set
PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig.
After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition,
for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the
transportation and the storage of the set PCB.
6) Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the
parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the
input terminal. Therefore, pay thorough attention not to handle the input terminals; such as to apply to the input terminals a
voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to
the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is
applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of
electrical characteristics.
7) Thermal design
Perform thermal design in which there are adequate margins by taking into account the power dissipation ( Pd ) in actual
states of use.
8) Treatment of package
Dusts or scratch on the photo detector may affect the optical characteristics. Please handle it with care.
9) Rush current
When power is first supplied to the CMOS IC, it is possible that the internal logic may be unstable and rush current may
flow instantaneously. Therefore, give special consideration to power coupling capacitance, power wiring, width of GND
wiring, and routing of connections.
10) The exposed central pad on the back side of the package
There is an exposed central pad on the back side of the package. Please mount by Footprint dimensions described in the
Jisso Information for WSOF5. This pad is GND level, therefore there is a possibility that LSI malfunctions and
heavy-current is generated.
www.rohm.com
? 2011 ROHM Co., Ltd. All rights reserved.
14/15
2011.11 - Rev.B
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