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参数资料
| 型号： | EVAL-CN0253-SDPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 1/4页 |
| 文件大小： | 0K |
| 描述： | EVAL MONITOR CIRCUIT FRONT END |
| 设计资源： | EVAL-CN0253-SDPZ Test-Procedure EVAL-CN0253-SDPZ Pads-Layout EVAL-CN0253-SDPZ Schematic |
| 标准包装： | 1 |
| 系列： | * |
Circuit Note
Devices Connected/Referenced
Circuits from the Lab? reference circuits are engineered and
tested for quick and easy system integration to help solve today’s
analog, mixed-signal, and RF design challenges. For more
information and/or support, visit www.analog.com/CN0253 .
High Voltage Latch-Up Proof,
4-/8-Channel Multiplexers
Wide Supply Range, Rail-to-Rail
Output Instrumentation Amplifier
A Robust, Low Power, Battery Monitoring Circuit Front End
EVALUATION AND DESIGN SUPPORT
Circuit Evaluation Boards
Design and Integration Files
CIRCUIT FUNCTION AND BENEFITS
The circuit shown in Figure 1 is a robust battery monitoring
front end designed for environments where transients are likely to
occur, such as in industrial or process automation environments.
The circuit uses the ADG5408 8-channel CMOS multiplexer
followed by the AD8226 instrumentation amplifier to provide
accurate voltage monitoring of individual cells at low power and
low cost, and requires no additional external transient protection
circuitry.
Transient overvoltage conditions may cause traditional CMOS
switches to experience latch up. In junction isolation technology,
the N- and P-wells of the PMOS and NMOS transistors form a
parasitic silicon-controlled rectifier (SCR) circuit. An overvoltage
condition triggers this SCR, causing a significant amplification of
current that, in turn, leads to latch-up. Latch-up is an undesirable,
high current state that can lead to device failure and can persist
until the power supply is turned off.
Latch-up can occur if either the input or the output pin voltage
exceeds the supply rail by more than a diode drop, or by improper
power supply sequencing. If a fault occurs on the channel, and
the signal exceeds the maximum rating, the fault can trigger the
latch-up state in an typical CMOS part.
During circuit power up, it is also possible for voltages to occur
on inputs before power is applied to the CMOS switch, especially if
multiple supplies are used to power the circuit. This condition
may exceed the maximum rating of the device and trigger a
latch-up state.
Rev. A
Circuits from the Lab? circuits from Analog Devices have been designed and built by Analog Devices
engineers. Standard engineering practices have been employed in the design and construction of
each circuit, and their function and performance have been tested and verified in a lab environment at
room temperature. However, you are solely responsible for testing the circuit and determining its
suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices
be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause
whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page)
The two multiplexers and the instrumentation amplifier (IA)
used in this design have robust inputs. The ADG5408 is a high
voltage 8:1 multiplexer that is latch-up proof. The trench isolation
technology used in the fabrication of the ADG5408 prevents
the latch-up state and reduces the need for external protection
circuitry. Latch-up proof does not guarantee overvoltage protection
and only means the switch does enter the high current SCR mode.
The ADG5408 also has an electrostatic discharge (ESD) rating
of 8 kV human body model (ANSI/ESDA/JEDEC JS-001-2010).
The AD8226 is a low cost, low power, instrumentation amplifier
with robust inputs and can handle input voltages up to 40 V from
the opposite supply rail, while restricting the output to within
the rails. For instance, with ±18 V supplies, the positive or negative
input of the AD8226 can swing between ±22 V with no damage.
All inputs of the AD8226 are protected against ESD with internal
diodes.
CIRCUIT DESCRIPTION
Battery monitoring systems (BMS) require the individual voltage
across each battery in a battery stack to assess the state of charge
(SOC) and state of health (SOH) of the battery. By multiplexing
the terminals of a stack of batteries with two multiplexers, as shown
in Figure 1, the voltage across each battery can be assessed.
One multiplexer is used for the positive terminal and another
for the negative terminal. This differential multiplexing allows
the use of a single instrumentation amplifier for up to eight
channels. The amplifier then removes the common-mode
voltage from each of the batteries for use by the BMS.
The ADG5408 has a low on-resistance per channel, typically
13.5 ?, and a maximum of 22 ? over temperature. With a
maximum of 2 nA input offset current, there is a maximum
of 44 nV error voltage across the channel resistances.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ?2012 Analog Devices, Inc. All rights reserved.
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