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| 型号： | EVB3030A |
| 英文描述： | W3030 3 V Dual-Mode IF Cellular Receiver |
| 中文描述： | W3030 3伏双模蜂窝接收机中频 |
| 文件页数： | 3/22页 |
| 文件大小： | 429K |
| 代理商： | EVB3030A |
Data Sheet
April 1999
W3030 3 V Dual-Mode IF Cellular Receiver
Lucent Technologies Inc.
11
RSSI
The RSSI output provides a voltage level that is
proportional to the amount of signal present in the
analog second IF section. This voltage level is
generated internally by summing of the signal current
at different points in the 40 dB and 60 dB IF chains.
The amount of loss between the 40 dB and 60 dB
sections will affect the RSSI linearity. Figure 3
contains two traces of RSSI voltage versus IF input
power. One trace is with only the filter loss between
the 40 dB and 60 dB amplifiers. The second trace is
with a filter and a resistor, to give a total loss of
5.6 dB. The figure indicates a nonlinearity around the
–75 dBm input level. This nonlinearity occurs because
the 60 dB amplifier chain enters compression, causing
less RSSI output. Eventually, as the input signal
increases, the 40 dB amplifier will begin to contribute
to the total RSSI.
It was determined that 6 dB of interstage loss
produces the optimal RSSI response. Most ceramic
filters have less than 6 dB insertion loss. Therefore,
some additional loss must be inserted in addition to
the filter. The simplest way is to use a resistor in
series with the filter. This method will cause a
mismatch to the filter and may distort its passband
response. An L or T configuration may be necessary
to provide the required loss without mismatching the
filter.
–125 –115 –105 –95
–85
–75
–65
–55
–45
–35
–25
IF1IN POWER (dBm)
0.4
0.7
1
1.3
1.6
1.9
2.2
RSSI
(Vdc)
ATTN 1.4 dB
ATTN 5.6 dB
Figure 3. RSSI Out vs. IF1IN Power: 1.4 dB and 5.6
dB Loss Between 40 dB and 60 dB
Amplifiers
Quadrature Detector
Figure 4 is a simplified schematic of the quadrature
detector of the W3030. The quadrature detector circuit
is similar to a mixer; but, instead of mixing two
different frequencies, it multiplies two signals of the
same frequency that are phase-shifted versions of
each other. Multiplying the phase-shifted with the
unshifted signals produces the audio portion of the FM
signal.
IFAOUT
CS
AUDIO
L
CP
CBYPASS
QUAD
R
Figure 4. Quadrature Detector
Before the IF signal is differentially applied to the
multiplier, the signal is passed through a limiter stage
to produce a constant amplitude signal. The same
signal is brought out single-ended to pin 4, IFAOUT.
The signal at IFAOUT is passed through a phase-
shifting network (CS + CP + L + R). The phase-shifted
signal is applied back to the lower portion of the
multiplier at pin 3, QUAD. The parallel L/C resonant
circuit provides frequency selective filtering at the IF
frequency. The L/C tank must be ac-grounded at the
IF frequency through a dc blocking capacitor
(CBYPASS).
Because information in an FM signal is contained in
the deviation from the center frequency, the design of
the resonant bandpass circuit is very important,
particularly the load Q. A higher-loaded Q for a given
deviation will produce a larger output signal than a
lower Q circuit. However, a high Q circuit will permit
only a limited amount of deviation from center
frequency before distortion occurs.
Figure 5 illustrates an equivalent quad tank circuit
including the W3030 40 k
input resistance.
Equations 1 and 2 are used to calculate resonant
frequency and tank circuit Q.
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