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参数资料
| 型号： | EVB51JM128 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 12/23页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR MCF51JM128 MCU |
| 产品培训模块： | Flexis JM Family Flexis JM™ USB Connectivity USB Controller Continuum |
| 标准包装： | 1 |
| 系列： | ColdFire® |
| 类型： | MCU |
| 适用于相关产品： | MCF51JM128 |
| 所含物品： | 评估板 |
| 产品目录页面： | 734 (CN2011-ZH PDF) |
| 相关产品： | MCF51JM128VLD-ND - IC MCU 128/16K FLASH/SRAM 44LQFP MCF51JM128VLH-ND - IC MCU 128/16K FLASH/SRAM 64LQFP MCF51JM128VQH-ND - IC MCU 128/16K FLASH/SRAM 64QFP |
E V B 5 1 J M 1 2 8
U S E R
G U I D E
F E B R U A R Y
1 ,
2 0 0 8
Reset LED
The RESET indicator will be ON for the duration of a valid RESET* signal. The RESET * sig-
nal is driven active while the MCU is in the RESET state.
Low Voltage Detect
The MCF51JM128 applies a Low Voltage Detect (LVD) module to detect under-voltage condi-
tions. The LVD may be configured to generate a RESET or an interrupt. Refer to the
MCF51JM128 Reference Manual for further details.
MEMORY
No external memory is applied to the EVB51JM128 board. Memory for application develop-
ment is internal to the MCF51JM128 MCU. This memory includes 128K bytes of Flash and
16K bytes of SRAM memory. Refer to the MCF51JM128RM for details on memory type and
location.
TIMING
The EVB51JM128 accepts timing input from several sources. A 12 MHz crystal is provided to
support application development. The target device also provides an internal timing source
with 9-bit trimming. Locations for a vertical SMA connector and a 14-pos DIP socket are pro-
vided but not installed in default configurations.
Table 1: OSC_SEL Option Header
?
?
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?
?
?
Selects Timing input from 12 MHz XTAL at Y1
XTAL
ALT
OSC
?
?
?
?
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?
?
?
?
?
?
?
Selects Timing input from SMA socket at J6 or DIP socket at X1. Neither
the SMA connector nor the DIP socket are installed on production boards.
XTAL
ALT
OSC
?
?
?
?
?
?
?
?
?
?
?
?
Selects PORTG functionality
XTAL
ALT
OSC
CAUTION:
Communications with the target may be lost if clock frequency or baud rate
changes during application execution.
An FLL and PLL to allow synthesizing a range of frequencies. Refer to the target MCU Refer-
ence Manual for details on using the FLL or PLL.
11
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