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| 型号： | FAN3278TMX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 1/15页 |
| 文件大小： | 0K |
| 描述： | IC BRIDGE DVR P-N 2A 30V 8-SOIC |
| 标准包装： | 2,500 |
| 配置： | 高端和低端 |
| 输入类型： | 反相和非反相 |
| 延迟时间： | 70ns |
| 电流 - 峰： | 1.5A |
| 配置数： | 1 |
| 输出数： | 2 |
| 电源电压： | 8 V ~ 27 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 带卷 (TR) |
July 2012
FAN3278
30V PMOS-NMOS Bridge Driver
Features
Description
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8V to 27V Optimum Operating Range
Drives High-Side PMOS and Low-Side NMOS in
Motor Control or Buck Step-Down Applications
Output Drive-Voltage Magnitude Limited: < 13V
for V DD up to 30V
Biases Each Load Device OFF with a 100k ?
Resistor when V DD Below Operating Level
Low-Voltage TTL Input Thresholds
Peak Gate Drives at 12V: +1.5A Sink, -1.0A Source
Internal Resistors Hold Driver Off When
No Inputs Present
8-Lead SOIC Package
Rated from –40°C to +125°C Ambient
The FAN3278 dual 1.5A gate driver is optimized to drive
a high-side P-channel MOSFET and a low-side
N-channel MOSFET in motor control applications
operating from a voltage rail up to 27V. Internal circuitry
limits the voltage applied to the gates of the external
MOSFETs to 13V maximum. The driver has TTL input
thresholds and provides buffer and level translation from
logic inputs. Internal circuitry prevents the output
switching devices from operating if the V DD supply
voltage is below the IC operation level. Internal 100k ?
resistors bias the non-inverting output LOW and the
inverting output to V DD to keep the external MOSFETs
off during startup intervals when logic control signals
may not be present.
The FAN3278 driver incorporates MOSFET devices for
the final output stage, providing high current throughout
the MOSFET turn-on / turn-off transition to minimize
Applications
? Motor Control with PMOS / NMOS Half-Bridge
Configuration
? Buck Converters with High-Side PMOS Device;
100% Duty Cycle Operation Possible
? Logic-Controlled Load Circuits with High-Side
PMOS Switch
switching loss. The internal gate-drive regulators
provide optimum gate-drive voltage when operating
from a rail of 8V to 27V. The FAN3278 can be driven
from a voltage rail of less than 8V; however, its gate
drive current is reduced.
The FAN3278 has two independent ENABLE pins that
default to ON if not connected. If the ENABLE pin for
non-inverting channel A is pulled LOW, OUTA is forced
LOW. If the ENABLE pin for inverting channel B is
pulled LOW, OUTB is forced HIGH. If an input is left
unconnected, internal resistors bias the inputs such that
the external MOSFETs are OFF.
Figure 1. Typical Application
? 2010 Fairchild Semiconductor Corporation
FAN3278 ? Rev. 1.0.1
www.fairchildsemi.com
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