参数资料
型号: FAN4860UC5X
厂商: Fairchild Semiconductor
文件页数: 16/19页
文件大小: 0K
描述: IC REG BOOST SYNC 5V 0.2A 6WLCSP
标准包装: 3,000
系列: TinyBoost™
类型: 升压(升压)
输出类型: 固定
输出数: 1
输出电压: 5V
输入电压: 2.3 V ~ 4.5 V
PWM 型: 电流模式
频率 - 开关: 3MHz
电流 - 输出: 200mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 6-UFBGA,WLCSP
包装: 带卷 (TR)
供应商设备封装: 6-WLCSP
The FAN4860 starts on the first pass (without triggering a
FAULT) under the following conditions for C EFF(MAX) :
Layout Guideline
Table 4.
Maximum C EFF for First-Pass Startup
Operating Conditions
V IN (V)
> 2.3
> 2.7
> 2.7
5.4 V OUT
27
27
37
R LOAD(MIN) ( ? )
5.0 V OUT
25
25
33
3.3 V OUT
16
16
20
C EFF(MAX) ( ? F)
10
15
22
C EFF values shown in Table 4 typically apply to the lowest
V IN . The presence of higher V IN enhances ability to start into
larger C EFF at full load.
Transient Protection
To protect against external voltage transients caused by
ESD discharge events, or improper external connections,
some applications employ an external transient voltage
suppressor (TVS) and Schottky diode (D1 in Figure 51).
Figure 51. FAN4860 with External Transient Protection
The TVS is designed to clamp the FB line (system V OUT ) to
+10 V or –2 V during external transient events. The Schottky
diode protects the output devices from the positive
excursion. The FB pin can tolerate up to 14 V of positive
excursion, while both the FB and VOUT pins can tolerate
negative voltages.
The FAN4860 includes a circuit to detect a missing or
defective D1 by comparing V OUT to FB. If V OUT – FB > about
0.7 V, the IC shuts down. The IC remains shut down until
V OUT < UVLO and V IN < UVLO+0.7 or EN is toggled.
C OUT2 may be necessary to preserve load transient response
when the Schottky is used. When a load is applied at the FB
pin, the forward voltage of the D1 rapidly increases before
the regulator can respond or the inductor current can
change. This causes an immediate drop of up to 300 mV,
depending on D1’s characteristics if C OUT2 is absent. C OUT2
supplies instantaneous current to the load while the regulator
adjusts the inductor current. A value of at least half of the
minimum value of C OUT should be used for C OUT2 . C OUT2
needs to withstand the maximum voltage at the FB pin as
the TVS is clamping.
The maximum DC output current available is reduced with
this circuit, due to the additional dissipation of D1.
? 2010 Fairchild Semiconductor Corporation
FAN4860 ? Rev. 1.1.1
16
Figure 52. WLCSP Suggested Layout (Top View)
Figure 53. UMLP Suggested Layout (Top View)
www.fairchildsemi.com
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