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| 型号： | FAN5346S20X |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 11/14页 |
| 文件大小： | 0K |
| 描述： | IC LED DVR ASYNC SER BOOST 6SSOT |
| 标准包装： | 1 |
| 恒定电流： | 是 |
| 拓扑： | PWM，升压（升压） |
| 输出数： | 1 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 通用 |
| 类型 - 次要： | 白色 LED |
| 频率： | 950kHz ~ 1.35MHz |
| 电源电压： | 2.5 V ~ 5.5 V |
| 输出电压： | 6.2 V ~ 18.5 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 细型，TSOT-23-6 |
| 供应商设备封装： | 6-SSOT |
| 包装： | 标准包装 |
| 工作温度： | -40°C ~ 85°C |
| 其它名称： | FAN5346S20XDKR |
Application Information
The reference schematic diagram is shown in Figure 29.
FAN5346 is able to drive up to eight LEDs with input voltage
equal to or greater than 2.9V (V IN ≥ 2.9V). However, the
number of LEDs that can be used FAN5346 depends on
forward voltage. It is recommended that the forward voltage
(V F ) of the white LED be no greater than 3.2V and the
maximum LED current be 20mA. FAN5345 can be also used
as a boost convertor by connect the V OUT point to the load
directly. The return trace of the load should also return to
GND through a sense resistor (R1).
Figure 29. Reference Application Schematic Diagram
Component Placement and PCB Recommendations
FAN5346 switches at 1.2MHz to boost the output voltage.
Component placement and PCB layout need to be carefully
taken into consideration to ensure stable output and to
prevent generation of noise. Figure 30 is a portion of the
evaluation board layout. The critical layout elements are: the
L1, C IN , C IN return trace, C OUT , and the C OUT return trace.
Figure 30. Reference PCB Layout
? 2011 Fairchild Semiconductor Corporation
FAN5346 ? Rev. 1.0.1
11
Input Capacitor and Return Trace
The input capacitor is the first priority in a switching buck or
boost regulator PCB layout. A stable input source (V IN )
enables a switching regulator to deliver its best performance.
During the regulator’s operation, it is switching at a high
frequency, which makes the load of C IN change dynamically
since it is trying to make the input source vary at the same
switching frequency as the regulator. To ensure a stable
input source, C IN needs to hold enough energy to minimize
the variation at the input pin of the regulator. For C IN to have
a fast response of charge / discharge, the trace from C IN to
the input pin of the regulator and the return trace from GND
of the regulator to C IN should be as short and wide as
possible to minimize trace resistance, inductance, and
capacitance. During operation, the current flow from C IN
through the regulator to the load and back to C IN contains
high-frequency variation due to switching. Trace resistance
reduces the overall efficiency due to I 2 R loss. Even a small
trace inductance could effectively yield ground variation to
add noise on VOUT. The input capacitor should be placed
close to the VIN and GND pins of the regulator and traces
should be as short as possible. Avoid routing the return trace
through different layers because vias have strong inductance
effect at high frequencies. If routing to other PCB layers is
unavoidable, place vias next to the VIN and GND pins of the
regulator to minimize the trace distance.
Output Capacitor and Return Trace
The output capacitor serves the same purpose as the input
capacitor, but also maintains a stable output voltage. As
explained above, the current travels to the load and back to
the C OUT GND terminal. C OUT should be placed close to the
VOUT pin. The traces of C OUT to L1, VOUT, and the return
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