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参数资料
| 型号： | FAN5361UMP123X |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 12/18页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC 1.233V 6UMLP |
| 标准包装： | 3,000 |
| 系列： | TinyBuck™ |
| 类型： | 降压（降压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 1.233V |
| 输入电压： | 2.3 V ~ 5.5 V |
| 频率 - 开关： | 6MHz |
| 电流 - 输出： | 600mA |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-UDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 6-UMLP（2x2） |
Operation Description
The FAN5361 is a 600mA or 750mA, step-down, switching
voltage regulator that delivers a fixed output from an input
To prevent shut-down during soft-start, the following condition
must be met:
voltage supply of 2.3V to 5.5V. Using a proprietary
architecture with synchronous rectification, the FAN5361 is
I DISP ? I LOAD ? I MAX ( DC )
(2)
capable of delivering a peak efficiency of 92%, while
maintaining efficiency over 80% at load currents as low as
1mA. The regulator operates at a nominal frequency of
6MHz at full load, which reduces the value of the external
components to 470nH for the inductor and 4.7μF for the
output capacitor.
Control Scheme
where I MAX(DC) is the maximum load current the IC is
guaranteed to support (600mA or 750mA).
Table 1 shows combinations of C OUT that allow the IC to start
successfully with the minimum R LOAD that can be supported.
Table 1. Minimum R LOAD Values for Soft-Start with
Various C OUT Values
The FAN5361 uses a proprietary, non-linear, fixed-frequency
PWM modulator to deliver a fast load transient response,
while maintaining a constant switching frequency over a wide
range of operating conditions. The regulator performance is
independent of the output capacitor ESR, allowing for the use
of ceramic output capacitors. Although this type of operation
normally results in a switching frequency that varies with input
voltage and load current, an internal frequency loop holds the
C OUT
4.7 ? F, 0402
2 X 4.7 ? F, 0402
10 ? F, 0603
10 ? F, 0805
Minimum R LOAD
V OUT / 0.60
V OUT / 0.60
V OUT / 0.60
V OUT / 0.50
switching frequency constant over a large range of input
voltages and load currents.
For very light loads, the FAN5361 operates in discontinuous
current (DCM) single-pulse PFM mode, which produces low
output ripple compared with other PFM architectures.
Transition between PWM and PFM is seamless, with a glitch
of less than 18mV at V OUT during the transition between
DCM and CCM modes.
Combined with exceptional transient response
characteristics, the very low quiescent current of the
controller (35μA) maintains high efficiency; even at very light
loads, while preserving fast transient response for
applications requiring tight output regulation.
Enable and Soft-Start
When EN is LOW, all circuits in FAN5361 are off and the IC
draws ~50nA of current. When EN is HIGH and V IN is above
its UVLO threshold, the regulator begins a soft-start cycle. The
output ramp during soft-start is a fixed slew rate of 50mV/ ? s
from 0 to 1 V OUT , then 12.5mV/ ? s until the output reaches its
setpoint. Regardless of the state of the MODE pin, PFM mode
is enabled to prevent current from being discharged from C OUT
if soft-start begins when C OUT is charged.
The IC may fail to start if heavy load is applied during startup
and/or if excessive C OUT is used. This is due to the current-
limit fault response, which protects the IC in the event of an
over-current condition present during soft-start.
The current required to charge C OUT during soft-start is
commonly referred to as “displacement current” is given as:
Startup into Large C OUT
Multiple soft-start cycles are required for no-load startup if
C OUT is greater than 15 ? F. Large C OUT requires light initial
load to ensure the FAN5361 starts appropriately. The IC
shuts down for 85 ? s when I DISP exceeds I LIMIT for more than
21 ? s of current limit. The IC then begins a new soft-start
cycle. Since C OUT retains its charge when the IC is off, the IC
reaches regulation after multiple soft-start attempts.
MODE Pin
Logic 1 on this pin forces the IC to stay in PWM mode. A
logic 0 allows the IC to automatically switch to PFM during
light loads. If the MODE pin is toggled, the converter
synchronizes its switching frequency to four times the
frequency on the mode pin (f MODE ).
The MODE pin is internally buffered with a Schmitt trigger,
which allows the MODE pin to be driven with slow rise and
fall times. An asymmetric duty cycle for frequency
synchronization is also permitted as long as the minimum
time below V IL(MAX) or above V IH(MAX) is 100ns.
Current Limit, Fault Shutdown, and Restart
A heavy load or short circuit on the output causes the current
in the inductor to increase until a maximum current threshold
is reached in the high-side switch. Upon reaching this point,
the high-side switch turns off, preventing high currents from
causing damage. The regulator continues to limit the current
cycle-by-cycle. After 21μs of current limit, the regulator
triggers an over-current fault, causing the regulator to shut
down for about 85 ? s before attempting a restart.
I DISP ? C OUT ?
dV
dt
(1)
If the fault was caused by short circuit, the soft-start circuit
attempts to restart and produces an over-current fault after
where the
dV
dt
term refers to the soft-start slew rate above.
about 32 ? s, which results in a duty cycle of less than 30%,
limiting power dissipation.
The closed-loop peak-current limit, I LIM(PK) , is not the same as
the open-loop tested current limit, I LIM(OL) , in the Electrical
Characteristics table. This is primarily due to the effect of
propagation delays of the IC current limit comparator.
? 2008 Fairchild Semiconductor Corporation
FAN5361 ? Rev. 1.1.3
12
www.fairchildsemi.com
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