参数资料
型号: FAN7392M
厂商: Fairchild Semiconductor
文件页数: 6/18页
文件大小: 0K
描述: IC GATE DVR HALF BRIDGE 16-SOICW
标准包装: 45
配置: 半桥
输入类型: 非反相
延迟时间: 130ns
电流 - 峰: 3A
配置数: 1
输出数: 2
高端电压 - 最大(自引导启动): 600V
电源电压: 10 V ~ 20 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC
包装: 管件
Electrical Characteristics
V BIAS (V CC , V BS , V DD )=15.0V, V SS =COM=0V and T A =25°C, unless otherwise specified. The V IH , V IL , and I IN
parameters are referenced to V SS and are applicable to the respective input leads: HIN, LIN, and SD. The V O and I O
parameters are referenced to V S and COM and are applicable to the respective output leads: HO and LO.
Symbol
Characteristics
Test Condition
Min. Typ. Max. Unit
Low-Side Power Supply Section
I QCC
Quiescent V CC Supply Current
V IN =0V or V DD
40
80
? A
I QDD
I PCC
I PDD
I SD
Quiescent V DD Supply Current
Operating V CC Supply Current
Operating V DD Supply Current
Shutdown Supply Current
V IN =0V or V DD
f IN =20kHz, rms, V IN =15V PP
f IN =20kHz, rms, V IN =15V PP
S D =V DD
430
300
120
10
? A
? A
? A
? A
V CCUV+
V CCUV-
V CCUVH
V CC Supply Under-Voltage ?
Positive-Going Threshold Voltage
V CC Supply Under-Voltage ?
Negative-Going Threshold Voltage
V CC Supply Under-Voltage Lockout
Hysteresis Voltage
V IN =0V, V CC =Sweep
V IN =0V, V CC =Sweep
V IN =0V, V CC =Sweep
7.7
7.3
8.8
8.4
0.4
9.9
9.5
V
V
V
Bootstrapped Supply Section
I QBS
I PBS
Quiescent V BS Supply Current
Operating V BS Supply Current
V IN =0V or V DD
f IN =20kHz, rms value
60
500
130
? A
? A
V BSUV+
V BSUV-
V BS Supply Under-Voltage ?
Positive-Going Threshold Voltage
V BS Supply Under-Voltage ?
Negative-Going Threshold Voltage
V IN =0V, V BS =Sweep
V IN =0V, V BS =Sweep
7.7
7.3
8.8
8.4
9.9
9.5
V
V
V BSUVH
I LK
V BS Supply Under-Voltage Lockout
Hysteresis Voltage
Offset Supply Leakage Current
V IN =0V, V BS =Sweep
V B =V S =600V
0.4
50
V
? A
Input Locic Section (HIN, LIN, and SD)
V IH
V IL
Logic “1” Input Threshold Voltage
Logic “0” Input Threshold Voltage
V DD =3V
V DD =15V
V DD =3V
V DD =15V
2.4
9.5
0.8
4.5
V
V
V
V
I IN+
Logic Input High Bias Current
V IN =V DD
20
40
? A
I IN-
R IN
Logic Input Low Bias Current
Logic Input Pull-Down Resistance
V IN =0V
375
750
3
? A
K ?
Gate Driver Output Section
V OH
V OL
High-Level Output Voltage (V BIAS - V O )
Low-Level Output Voltage
No Load (I O =0A)
No Load (I O =0A)
1.5
200
V
mV
I O+
Output High, Short-Circuit Pulsed Current (4)
V O =0V, PW ? 10μs
2.5
3.0
A
I O-
Output Low, Short-Circuit Pulsed
Current (4)
V O =15V, PW ? 10μs
2.5
3.0
A
V SS /COM V SS -COM/COM-V SS Voltage Endurability
-5.0
5.0
V
- V S
Allowable Negative V S Pin Voltage for HIN
Signal Propagation to HO
-9.8
-7.0
V
? 2009 Fairchild Semiconductor Corporation
FAN7392 Rev. 1.0.4
6
www.fairchildsemi.com
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