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参数资料
| 型号： | FAN7392N |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 17/18页 |
| 文件大小： | 0K |
| 描述： | IC GATE DVR MONO HI/LO 14DIP |
| 标准包装： | 25 |
| 配置： | 半桥 |
| 输入类型： | 非反相 |
| 延迟时间： | 130ns |
| 电流 - 峰： | 3A |
| 配置数： | 1 |
| 输出数： | 2 |
| 高端电压 - 最大（自引导启动）： | 600V |
| 电源电压： | 10 V ~ 20 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 14-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 14-DIP |
| 包装： | 管件 |
| 产品目录页面： | 1216 (CN2011-ZH PDF) |
Physical Dimensions (Continued)
.
B
7.50±0.10
10.325
16
10.30±0.20
8.890
9
A
9.44
9.2 10.95
PIN ONE
INDICATOR
1
0.51
0.35
0.25
M
8
1.27
C B A
1.75 TYP
1.27 TYP
0.55 TYP
LAND PATTERN RECOMMENDATION
2.65 MAX
0.20±0.10
C
0.10 C
SEE DETAIL A
SEATING PLANE
0.33
0.20
FLASH OR BURRS.
D) LANDPATTERN STANDARD: SOIC127P1030X265-16L
(R0.10)
(R0.10)
8°
0°
0.75
0.25
X 45°
GAGE PLANE
0.25
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-013, ISSUE E, DATED SEPT 2005.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
pdip8_dim.pdf
E) DRAWING FILENAME: MKT-16Brev2
0.40~1.27
(1.40)
SEATING PLANE
DETAIL A
SCALE: 2:1
M16BREV2
Figure 40. 16-Lead Small Outline Package (SOP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, ?
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor ’s online packaging area for the most recent package drawings: ?
http://www.fairchildsemi.com/packaging/ .
? 2009 Fairchild Semiconductor Corporation
FAN7392 Rev. 1.0.4
17
www.fairchildsemi.com
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