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参数资料
| 型号： | FAN7631SJX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 14/19页 |
| 文件大小： | 0K |
| 描述： | IC CTLR PFM RESON CONV 16-SOIC |
| 标准包装： | 2,000 |
| 应用： | 谐振转换器控制器 |
| 电源电压： | 11.1 V ~ 21 V |
| 电流 - 电源： | 10mA |
| 工作温度： | -40°C ~ 130°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOP |
| 包装： | 带卷 (TR) |
5.5. Over-Voltage Protection (OVP)
When the LV CC reaches 23V, OVP is triggered. This
protection is used when auxiliary winding of the
transformer is utilized to supply V CC to the FAN7631.
5.6. Thermal Shutdown (TSD)
The thermal shutdown function is integrated to detect
abnormal over-temperature, such as abnormal ambient
temperature rising or over-driving of gate drive circuit. If
the junction temperature exceeds T SD (130 ? C), thermal
shutdown is triggered in Latch Mode.
6. Simple Remote-On/Off
The power stage can be shut down with Latch Mode or
Auto-Restart Mode, as shown in Figure 41. For the Latch
Mode protection, the FI pin is used, which stops the
switching immediately once the voltage on FI pin is
pulled above V FI (4V) using an opto-coupler. To configure
an external protection with Auto-Restart Mode, an opto-
coupler can be used on the LS pin. When voltage on the
LS pin is pulled below V LINE (3V), line UVLO is triggered.
When LS pin voltage is pulled HIGH, above 3V,
FAN7631 starts up softly.
5.7. Line-UVLO
FAN7631 includes a precise line-UVLO (or brownout)
function with programmable hysteresis voltage, as can
be seen in Figure 39. When the line voltage is recovered,
it starts up with soft-start, as shown in Figure 39. A
hysteresis voltage between the start and stop voltage is
programmable by I LINE and external resistor R1. In normal
operation, the comparator’s output is HIGH and I LINE is
disabled I LINE is activated when the comparator’s output
is LOW, introducing hysteresis.
If necessary, C Filter can be used to reduce noise
interference. Generally, hundreds of pico-farad to tens of
nano-farad is adequate depending on the level of noise.
Figure 41. External Protection Circuits
(Top: Latch Mode, Bottom: A/R Mode)
7. Skip Cycle Operation
Figure 39. Line-UVLO
The FAN7631 provides the pulse-skip function to prevent
the switching frequency from increasing too much at no-
load condition. Figure 42 shows the internal block
diagram for the control (CON) pin and its external
configuration. The CON pin is typically connected to the
collector terminal of the opto-coupler and the FAN7631
stops switching when the CON pin voltage drops below
0.4V. FAN7631 resumes switching when the CON pin
voltage rises above 0.6V. The frequency that causes
pulse skipping is given as:
f SKIP ? (
5.8 k ?
R min
?
4.6 k ?
R max
) ? 100 kHz
(9)
Figure 40. Line UVLO Waveforms
The DC link input-voltages for start and stop are
calculated as:
V DL , STOP ? V LINE ?
R 1 ? R 2
R 2
V DL , START ? V DL , STOP ? I LINE ? R 1
? 2011 Fairchild Semiconductor Corporation
FAN7631 ? 1.0.2
(8)
14
Figure 42. Pulse-Skipping Circuit
www.fairchildsemi.com
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