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参数资料
| 型号： | FDD24AN06LA0_F085 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 13/16页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH 60V 40A TO-252 |
| 产品变化通告： | Product Obsolescence 13/Aug/2010 |
| 产品目录绘图： | DPAK, TO-252(AA) |
| 标准包装： | 1 |
| 系列： | PowerTrench® |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 逻辑电平门 |
| 漏极至源极电压(Vdss)： | 60V |
| 电流 - 连续漏极(Id) @ 25° C： | 40A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 19 毫欧 @ 40A，10V |
| Id 时的 Vgs(th)（最大）： | 2V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 21nC @ 5V |
| 输入电容 (Ciss) @ Vds： | 1850pF @ 25V |
| 功率 - 最大： | 75W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | TO-252-3，DPak（2 引线+接片），SC-63 |
| 供应商设备封装： | TO-252 |
| 包装： | 标准包装 |
| 其它名称： | FDD24AN06LA0_F085DKR |
HIGH-SPEED, LOW-SIDE, GATE DRIVERS
POWER PRODUCTS
Low-Side Gate Drivers
Fairchild’s line of high-speed, low-side gate drivers provide high peak currents of several amps that are needed to switch
Power MOSFETs efficiently. These provide internal power-up protection, high noise immunity and appropriate power
dissipation for 125°C operation.
Input level flexibility is provided with versions for both CMOS, TTL and external threshold levels. Output performance
is optimized by a proprietary compound MillerDrive ? architecture for strong gate drive current and low voltage drop.
Industry standard pinouts allow easy migration to Fairchild’s MillerDrive for improved design performance.
Additionally, the outputs are held low if no input signal is present for fail-safe operation. The low well-matched
propagation delay, low quiescent current, fail-safe input and under voltage lockout features provide for fail-safe design
with minimal component count. Fairchild’s automotive gate drivers are all AEC-Q100 qualified and operate over a ?40
to 125°C ambient temperature range.
V DD
V IN
Input
Stage
V OUT
PWMA
GND
PWMB
1
2
3
4
FAN3227
8
7
6
5
OUTA
V DD
OUTB
SOIC-8
Low-Side Gate Drivers
MillerDrive ? Output Architecture
Product Number
V DD Range
(V)
Max. V IO
to GND (V)
Enable
Pin
Input
Input Number Pulsed Output Output Propagation Propagation Delay
Thresholds of Channels Current (mA) Delay (ns) Matching (ns)
No. of
GND Pins
Package
FAN3216TMX_F085
FAN3216CMX_F085
FAN3226TMX_F085
FAN3226CMX_F085
FAN3217TMX_F085
FAN3217CMX_F085
FAN3227TMX_F085
FAN3227CMX_F085
FAN3228TMX_F085
FAN3228CMX_F085
FAN3229TMX_F085
FAN3229CMX_F085
FAN3213TMX_F085
FAN3213CMX_F085
FAN3223TMX_F085
FAN3223CMX_F085
FAN3214TMX_F085
FAN3214CMX_F085
FAN3224TMX_F085
FAN3224CMX_F085
FAN3225TMX_F085
FAN3225CMX_F085
FAN3121TMX_F085
FAN3121CMX_F085
FAN3122TMX_F085
FAN3122CMX_F085
4.5-18.0
4.5-18.0
4.5-18.0
4.5-18.0
4.5-18.0
4.5-18.0
4.5-18.0
4.5-18.0
4.5-18.0
4.5-18.0
4.5-18.0
4.5-18.0
4.5-18.0
20
20
20
20
20
20
20
20
20
20
20
20
20
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Yes
Yes
Single Input
Inverting
Single Input
Inverting
Single Input
Non-Inverting
Single Input
Non-Inverting
Dual Input
Inverting &
Non Inverting
Dual Input
Inverting &
Non Inverting
Single Input
Inverting
Single Input
Inverting
Single Input
Non-Inverting
Single Input
Non-Inverting
Dual Input
Inverting &
Non Inverting
Single Input
Inverting
Single Input
Non-Inverting
TTL
CMOS
TTL
CMOS
TTL
CMOS
TTL
CMOS
TTL
CMOS
TTL
CMOS
TTL
CMOS
TTL
CMOS
TTL
CMOS
TTL
CMOS
TTL
CMOS
TTL
CMOS
TTL
CMOS
2
2
2
2
2
2
2
2
2
2
2
1
1
2000
2000
2000
2000
2000
2000
4000
4000
4000
4000
4000
9000
9000
20
20
20
20
20
20
20
20
20
20
20
20
20
<2
<2
<2
<2
<2
<2
<2
<2
<2
<2
<2
<2
<2
1
1
1
1
1
1
1
1
1
1
1
2
2
SO-8
SO-8
SO-8
SO-8
SO-8
SO-8
SO-8
SO-8
SO-8
SO-8
SO-8
SO-8
SO-8
f a i rc hi l d s e mi.c o m
13
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