参数资料
型号: FDMF6706B
厂商: Fairchild Semiconductor
文件页数: 14/18页
文件大小: 0K
描述: MODULE DRMOS 45A 40-PQFN
标准包装: 3,000
系列: XS™ DrMOS
类型: 高端/低端驱动器
输入类型: PWM
输出数: 1
电流 - 输出 / 通道: 45A
电源电压: 4.5 V ~ 5.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 40-PowerTFQFN
供应商设备封装: 40-PQFN(6x6)
包装: 带卷 (TR)
Application Information
Supply Capacitor Selection
For the supply inputs (VDRV & VCIN), a local ceramic
bypass capacitor is required to reduce noise and to
supply peak transient currents during gate drive
switching action. It is recommended to use a minimum
capacitor value of 1 μF X7R or X5R. Keep this capacitor
close to the VCIN and VDRV pins and connect it to the
GND plane with vias.
Bootstrap Circuit
The bootstrap circuit uses a charge storage capacitor
(C BOOT ), as shown in Figure 28. A capacitance of 100 nF
X7R or X5R capacitor is typically adequate. A series
bootstrap resistor may be needed for specific
applications to improve switching noise immunity. The
VCIN Filter
The VDRV pin provides power to the gate drive of the
high-side and low-side power MOSFETs. In most cases,
VDRV can be connected directly to VCIN, which
supplies power to the logic circuitry of the gate driver.
For additional noise immunity, an RC filter can be
inserted between VDRV and VCIN. Recommended
values of 10 ? (R VCIN ) placed between VDRV and VCIN
and 1 μF (C VCIN ) from VCIN to CGND, Figure 27.
Power Loss and Efficiency
Measurement and Calculation
Refer to Figure 28 for power loss testing method. Power
loss calculations are:
boot resistor (R BOOT ) may be required when operating
near the maximum rated V IN and is effective at
controlling the high-side MOSFET turn-on slew rate and
VSHW overshoot. Typical R BOOT values from 0.5 to
2.0 W are effective in reducing VSWH overshoot.
P IN =(V IN x I IN ) + (V 5V x I 5V ) (W)
P SW =V SW x I OUT (W)
P OUT =V OUT x I OUT (W)
P LOSS_MODULE =P IN - P SW (W)
P LOSS_BOARD =P IN - P OUT (W)
EFF MODULE =100 x P SW /P IN (%)
EFF BOARD =100 x P OUT /P IN (%)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Figure 27.
Block Diagram With V CIN Filter
V 5V
A
I 5V
C VDRV
R VCIN
C VCIN
C VIN
A
I IN
V IN
VDRV
VCIN
VIN
DISB
PWM
DISB#
BOOT
R BOOT
Input
OFF
ON
Open-
Drain
PWM
SMOD#
THWN#
FDMF6706B
VSWH
PHASE
C BOOT
L OUT
C OUT
I OUT
A
V OUT
Output
CGND
PGND
V V SW
? 2011 Fairchild Semiconductor Corporation
FDMF6706B ? Rev. 1.0.2
Figure 28.
Power Loss Measurement
14
www.fairchildsemi.com
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