参数资料
型号: FDS8926A
厂商: FAIRCHILD SEMICONDUCTOR CORP
元件分类: JFETs
英文描述: Dual N-Channel Enhancement Mode Field Effect Transistor
中文描述: 5.5 A, 30 V, 0.03 ohm, 2 CHANNEL, N-CHANNEL, Si, POWER, MOSFET
封装: SOIC-8
文件页数: 2/8页
文件大小: 201K
代理商: FDS8926A
Electrical Characteristics
(
T
A
= 25
O
C unless otherwise noted )
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
BV
DSS
/
T
J
I
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250 μA
I
D
= 250 μA, Referenced to 25
o
C
30
V
Breakdown Voltage Temp. Coefficient
32
mV /
o
C
Zero Gate Voltage Drain Current
V
DS
= 24 V, V
GS
= 0 V
1
μA
T
J
= 55°C
10
μA
I
GSSF
I
GSSR
ON CHARACTERISTICS
(Note 2)
Gate - Body Leakage, Forward
V
GS
= 8 V, V
DS
= 0 V
V
GS
= -8 V, V
DS
= 0 V
100
nA
Gate - Body Leakage, Reverse
-100
nA
V
GS(th)
V
GS(th)
/
T
J
R
DS(ON)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 μA
I
D
= 250 μA, Referenced to 25
o
C
0.4
0.67
1
V
Gate Threshold Voltage Temp. Coefficient
-3
mV /
o
C
Static Drain-Source On-Resistance
V
GS
= 4.5 V, I
D
= 5.5 A
0.025
0.03
T
J
=125°C
0.037
0.052
V
GS
= 2.5 V, I
D
= 4.5 A
V
GS
= 4.5 V, V
DS
= 5 V
V
DS
= 5 V, I
D
= 5.5 A
0.031
0.038
I
D(ON)
g
FS
DYNAMIC CH ARACTERISTICS
On-State Drain Current
20
A
Forward Transconductance
20
S
C
iss
C
oss
C
rss
SWITCHING CHARACTERISTICS
(Note 2)
Input Capacitance
V
= 10 V, V
GS
= 0 V,
f = 1.0 MHz
900
pF
Output Capacitance
410
pF
Reverse Transfer Capacitance
110
pF
t
D(on)
t
r
Turn - On Delay Time
V
DS
= 6 V, I
D
= 1 A
V
GS
= 4.5 V , R
GEN
= 6
6
12
ns
Turn - On Rise Time
19
31
t
D(off)
t
f
Q
g
Q
gs
Q
gd
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Turn - Off Delay Time
42
67
Turn - Off Fall Time
13
24
Total Gate Charge
V
DS
= 10 V, I
D
= 5.5 A,
V
GS
= 4.5 V
19.8
28
nC
Gate-Source Charge
2
Gate-Drain Charge
6.3
I
S
V
SD
Maximum Continuous Drain-Source Diode Forward Current
1.3
A
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 1.3 A
(Note 2)
0.68
1.2
V
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
FDS8926A Rev.B
c. 135
O
C/W on a 0.003 in
2
pad of 2oz copper.
b. 125
O
C/W on a 0.02 in
2
pad of 2oz copper.
a. 78
O
C/W on a 0.5 in
2
pad of 2oz copper.
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