参数资料
型号: FDZ7064S
厂商: FAIRCHILD SEMICONDUCTOR CORP
元件分类: JFETs
英文描述: TERMINAL
中文描述: 13.5 A, 30 V, 0.007 ohm, N-CHANNEL, Si, POWER, MOSFET
封装: ULTRA THIN, BGA-30
文件页数: 2/7页
文件大小: 231K
代理商: FDZ7064S
2004 Fairchild Semiconductor Corporation
FDZ7064S Rev. B2 (W)
Electrical Characteristics
Symbol
T
A
= 25°C unless otherwise noted
Test Conditions
Parameter
Min
Typ
Max Units
Off Characteristics
BV
DSS
BV
DSS
T
J
I
DSS
I
GSS
Drain
–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage
V
GS
= 0 V,
I
D
= 1mA
30
V
I
D
= 10mA, Referenced to 25°C
26
mV/°C
V
DS
= 24 V,
V
GS
= ±16 V, V
DS
= 0 V
V
GS
= 0 V
500
±100
uA
nA
On Characteristics
V
GS(th)
V
GS(th)
T
J
R
DS(on)
(Note 2)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V
DS
= V
GS
,
I
D
= 1mA
1
1.4
3
V
I
D
= 10mA, Referenced to 25°C
–0.5
mV/°C
V
GS
= 10 V,
V
GS
= 4.5 V, I
D
= 12 A
V
GS
=10 V, I
D
=13.5A, T
J
=125
°
C
V
DS
= 5 V,
I
D
= 13.5 A
I
D
= 13.5 A
6
7
9
66
7
9
11
m
g
FS
Forward Transconductance
S
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
G
Gate Resistance
2840
525
190
1.9
pF
pF
pF
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
V
GS
= 15 mV, I
D
= 6 A
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
11
12
50
18
25
7
6
20
22
80
32
35
ns
ns
ns
ns
nC
nC
nC
V
DS
= 15 V,
V
GS
= 10 V,
I
D
= 1 A,
R
GEN
= 6
V
DS
= 15 V, I
D
= 13.5 A,
V
GS
= 5 V
Drain
–Source Diode Characteristics
V
SD
Drain
–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
V
GS
= 0 V,
I
S
= 3.2 A
(Note 1)
0.4
0.7
V
22
19
ns
nC
I
F
= 13.5 A, d
iF
/d
t
= 300 A/μs
See Diode Characteristic, page
5
Notes:
1.
R
the circuit board side of the solder ball, R
copper chip carrier. R
is determined with the device mounted on a 1 in2 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. The thermal resistance from the junction to
, is defined for reference. For R
, the thermal reference point for the case is defined as the top surface of the
and R
are guaranteed by design while R
is determined by the user's board design.
a)
56°C/W when
mounted on a 1in
2
pad
of 2 oz copper
b)
119°C/W when mounted on
a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
F
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