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参数资料
| 型号： | FIN1101M |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 3/6页 |
| 文件大小： | 0K |
| 描述： | IC REPEATER SGL PORT LVDS 8SOIC |
| 产品变化通告： | Mold Compound Change 12/Sept/2008 Product Discontinuation 14/Mar/2011 |
| 标准包装： | 95 |
| 类型： | 转发器 |
| Tx/Rx类型： | LVDS |
| 延迟时间： | 1.1ns |
| 电容 - 输入： | 2.2pF |
| 电源电压： | 3 V ~ 3.6 V |
| 电流 - 电源： | 9.3mA |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 管件 |
3
www.fairchildsemi.com
FI
N1
101
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 3: All typical values are at TA = 25°C and with VCC = 3.3V, VID = 300mV, VIC = 1.2V unless otherwise specified.
Note 4: tSK(PP) is the magnitude of the difference in differential propagation delay times between identical channels of two devices switching in the same
direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test cir-
cuits.
Note 5: Passing criteria for maximum frequency is the output VOD > 200 mV and the duty cycle is 45% to 55% with all channels switching.
Note 6: Output loading is transmission line environment only; CL is < 1 pF of stray test fixture capacitance.
FIGURE 1. Differential Receiver Voltage Definitions and
Propagation I and Transition Time Test Circuit
FIGURE 2. Differential Driver DC Test Circuit
Note A: All LVDS input pulses have frequency
= 10MHz, t
R or tF < = 0.5 ns
Note B: CL includes all probe and test fixture capacitances
FIGURE 3. Differential Driver Propagation Delay and Transition Time Test Circuit
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 3)
tPLHD
Differential Propagation Delay
0.75
1.1
1.75
ns
LOW-to-HIGH
tPHLD
Differential Propagation Delay
RL = 100 , CL = 5 pF,
0.75
1.1
1.75
ns
HIGH-to-LOW
VID = 200 mV to 450 mV,
tTLHD
Differential Output Rise Time (20% to 80%)
VIC = |VID|/2 to (VCC (VID/2),
0.29
0.40
0.58
ns
tTHLD
Differential Output Fall Time (80% to 20%)
Duty Cycle
= 50%,
0.29
0.40
0.58
ns
tSK(P)
Pulse Skew |tPLH - tPHL|
See Figure 3 and Figure 4
0.01
0.2
ns
tSK(PP)
Part-to-Part Skew (Note 4)
0.5
ns
fMAX
Maximum Frequency (Note 5)(Note 6)
400
800
MHz
tPZHD
Differential Output Enable Time from Z to HIGH
2.1
5
ns
tPZLD
Differential Output Enable Time from Z to LOW
RL = 100 , CL = 5 pF,
2.3
5
ns
tPHZD
Differential Output Disable Time from HIGH to Z See Figure 2 and Figure 3
1.5
5
ns
tPLZD
Differential Output Disable Time from LOW to Z
1.8
5
ns
tDJ
LVDS Data Jitter,
VID = 300 mV, PRBS = 2
23
1,
85
135
ps
Deterministic
VIC = 1.2V at 800 Mbps
tRJ
LVDS Clock Jitter, Random
VID = 300 mV
2.1
3.5
ps
(RMS)
VIC = 1.2 V at 400 MHz
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| FIN1101M_Q | 功能描述:总线发射器 1 Port Repeater LVDS Hi Speed RoHS:否 制造商:Texas Instruments 数据速率:135 Mpps 接口: 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-56 封装:Reel |
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