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| 型号： | FL7930BM |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 13/23页 |
| 文件大小： | 0K |
| 描述： | IC PFC CTLR FLYBACK/BOUND 8SOICN |
| 标准包装： | 95 |
| 类型： | 镇流器控制器 |
| 频率： | 250kHz ~ 350kHz |
| 电流 - 电源： | 2.5mA |
| 电源电压： | 13 V ~ 20 V |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOP |
| 包装： | 管件 |
Once the first OVP triggers, switching stops immediately
and recovers switching when the output voltage is
decreased with a hysteresis. When the second OVP
triggers, switching can be recovered only when the V CC
supply voltage falls below V STOP and builds up higher
where, V AUX is the auxiliary winding voltage; T IND and
T AUX are boost inductor turns and auxiliary winding turns,
respectively; V AC is input voltage for PFC converter; and
V OUT_PFC is output voltage from the PFC converter.
than V START again and V OVP should be lower than
hysteresis. If the second OVP is not used, the OVP pin
must be connected to the INV pin or to the ground.
V CC
V INPFC
PFC Inductor
Aux. Winding
V CC
V OUTPFC
R ZCD
V STOP
V START
ZCD
Negative Clamp
Circuit
V INV
INV OVP
Level
hysteresis
Error on INV
Resistors
Happens
C ZCD
5
-
+
V TH(ZCD)
Restart
Timer
Positive Clamp
Optional
Circuit
THD
S
Q
f MAX
Limit
Gate
Driver
V OVP
OVP Level
Though Output-
Voltage Reduced,
no Switching.
OVP Level
Optimized
Sawtooth
Generator
R
Q
Figure 27.
Circuit Near ZCD
Because auxiliary winding voltage can swing from
I MOSFET
Switching stop
only during
OVP
Switching stop
until V CC drops
below V STOP and
recovers to
V START
If error
still exist,
OVP
triggers
again
negative to positive voltage, the internal block in ZCD
pin has both positive and negative voltage clamping
circuits. When the auxiliary voltage is negative, an
internal circuit clamps the negative voltage at the ZCD
pin around 0.65 V by sourcing current to the serial
t
resistor between the ZCD pin and the auxiliary winding.
When the auxiliary voltage is higher than 6.5 V, current
Figure 26.
Comparison of First and Second
is sinked through a resistor from the auxiliary winding to
OVP Recovery Modes
4. Control Range Compensation : On time is controlled
the ZCD pin.
I SW
by the output voltage compensator with FL7930B. Due
I MOSFET
I DIODE
V ACIN
to this when input voltage is high and load is light,
control range becomes narrow compared to when input
voltage is low. That control range decrease is inversely
( control range ∝
). Thus at high line,
input voltage
proportional to the double square of the input voltage
1
2
unwanted burst operation easily happens at light load
V AUX & V ZCD
V AUX
V ZCD
and audible noise may be generated from the boost
inductor or inductor at input filter. Different from the
6.2V
0.65V
other converters, burst operation in PFC block is not
needed because the PFC block itself is normally
disabled during standby mode. To reduce unwanted
burst operation at light load, an internal control range
compensation function is implemented and shows no
burst operation until 5% load at high line.
5. Zero-Current Detection : Zero-current detection
(ZCD) generates the turn-on signal of the MOSFET
when the boost inductor current reaches zero using an
auxiliary winding coupled with the inductor. When the
power switch turns on, negative voltage is induced at the
auxiliary winding due to the opposite winding direction
( see Equation 1 ). Positive voltage is induced (see
Equation 2) when the power switch turns off:
t
Figure 28. Auxiliary Voltage Depends
on MOSFET Switching
The auxiliary winding voltage is used to check the boost
inductor current zero instance. When boost inductor
current becomes zero, there is a resonance between
boost inductor and all capacitors at the MOSFET drain
pin, including C OSS of the MOSFET; an external
capacitor at the D-S pin to reduce the voltage rising and
falling slope of the MOSFET; a parasitic capacitor at
inductor; and so on to improve performance. Resonated
voltage is reflected to the auxiliary winding and can be
used for detecting zero current of boost inductor and
valley position of MOSFET voltage stress. For valley
V AUX ? ? AUX ? V AC
V AUX ? AUX ? ? V PFCOUT ? V AC ?
T
T IND
T
T IND
? 2010 Fairchild Semiconductor Corporation
FL7930B ? Rev. 1.0.4
(1)
(2)
13
detection, a minor delay by the resistor and capacitor is
needed. A capacitor increases the noise immunity at the
ZCD pin. If ZCD voltage is higher than 1.5 V, an internal
ZCD comparator output becomes HIGH and LOW when
the ZCD goes below 1.4 V. At the falling edge of
comparator output, internal logic turns on the MOSFET.
www.fairchildsemi.com
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相关代理商/技术参数 |
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|---|---|
| FL7930BMX | 功能描述:功率因数校正 IC PFC Controller for Lighting; 2nd OVP RoHS:否 制造商:Fairchild Semiconductor 开关频率:300 KHz 最大功率耗散: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Reel |
| FL7930BMX_G | 制造商:Fairchild Semiconductor Corporation 功能描述: 制造商:Fairchild Semiconductor Corporation 功能描述:IC PFC CTLR FLYBACK/BOUND 8SOIC |
| FL7930CM | 功能描述:功率因数校正 IC PFC Controller for Lighting; PFC Ready RoHS:否 制造商:Fairchild Semiconductor 开关频率:300 KHz 最大功率耗散: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Reel |
| FL7930CMX | 功能描述:功率因数校正 IC Single Stage Flyback PFC Controller RoHS:否 制造商:Fairchild Semiconductor 开关频率:300 KHz 最大功率耗散: 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Reel |
| FL7930CMX_G | 制造商:Fairchild Semiconductor Corporation 功能描述:IC PFC CTLR FLYBACK/BOUND 8SOIC |
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