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参数资料
| 型号： | FLS1700XS |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 9/13页 |
| 文件大小： | 0K |
| 描述： | IC CTLR FPS HALF BRIDG LCC 9-SIP |
| 标准包装： | 19 |
| 系列： | FLS |
| 输出数： | 1 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 通用 |
| 频率： | 94kHz ~ 106kHz |
| 安装类型： | 通孔 |
| 封装/外壳： | 9-SSIP |
| 供应商设备封装： | 9-SIP |
| 包装： | 管件 |
| 工作温度： | -40°C ~ 130°C |
Functional Description
1. Basic Operation . FLS-XS series is designed to drive
high-side and low-side MOSFETs complementarily with
50% duty cycle. A fixed dead time of 350ns is introduced
between consecutive transitions, as shown in Figure 15.
Figure 15. MOSFETs Gate Drive Signal
2. Internal Oscillator : FLS-XS series employs a current-
controlled oscillator, as shown in Figure 16. Internally,
the voltage of the R T pin is regulated at 2V and the
Figure 17. Resonant Converter Typical Gain Curve
charging / discharging current for the oscillator capacitor,
C T , is obtained by copying the current flowing out of the
R T pin (I CTC ) using a current mirror. Therefore, the
switching frequency increases as I CTC increases.
Figure 16. Current-Controlled Oscillator
Figure 18. Frequency Control Circuit
f min =
× 100( kHz )
5.2 k Ω
) until the output
from an initial high frequency ( f
3. Frequency Setting : Figure 17 shows the typical
voltage gain curve of a resonant converter, where the
gain is inversely proportional to the switching frequency
in the ZVS region. The output voltage can be regulated
by modulating the switching frequency. Figure 18 shows
the typical circuit configuration for the R T pin, where the
opto-coupler transistor is connected to the R T pin to
modulate the switching frequency.
The minimum switching frequency is determined as:
(1)
R min
Assuming the saturation voltage of opto-coupler
transistor is 0.2V, the maximum switching frequency is
To prevent excessive inrush current and overshoot of
output voltage during startup, increase the voltage gain
of the resonant converter progressively. Since the
voltage gain of the resonant converter is inversely
proportional to the switching frequency, the soft-start is
implemented by sweeping down the switching frequency
ISS
voltage is established. The soft-start circuit is made by
connecting R-C series network on the R T pin, as shown
in Figure 18. FLS-XS series also has a 3ms internal soft-
start to reduce the current overshoot during the initial
cycles, which adds 40kHz to the initial frequency of the
external soft-start circuit, as shown in Figure 19. The
initial frequency of the soft-start is given as:
= (
+
determined as:
max 5.2 k Ω 4.68 k Ω
f
R min R max
) × 100( kHz )
(2)
f ISS = (
5.2 k Ω
R min
+
5.2 k Ω
R SS
) × 100 + 40 ( kHz )
(3)
? 2010 Fairchild Semiconductor Corporation
FLS-XS Series ? Rev.1.0.0
9
www.fairchildsemi.com
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