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参数资料
| 型号： | FPF2026 |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 14/17页 |
| 文件大小： | 0K |
| 描述： | IC LOAD SWITCH 100MA 6-WLCSP |
| 标准包装： | 3,000 |
| 类型： | 高端开关 |
| 输出数： | 1 |
| Rds（开）： | 315 毫欧 |
| 内部开关： | 是 |
| 电流限制： | 150mA |
| 输入电压： | 1.6 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-UFBGA，WLCSP |
| 供应商设备封装： | 6-WLCSP |
| 包装： | 带卷 (TR) |
Application Information
Input Capacitor
To limit the voltage drop on the input supply caused by transient
in-rush currents when the switch is turned on into a discharged
load capacitor or a short-circuit, a capacitor is recommended to
be placed between V IN and GND. The FPF2024-FPF2027
series feature a slow turn-on to limit the inrush current and
requires a smaller input capacitor. A 1uF ceramic capacitor, C IN ,
placed close to the pins is typically sufficient. Higher values of
C IN can be used to further reduce the voltage drop.
Output Capacitor
A 0.1uF capacitor C OUT , should be placed between V OUT and
GND. This capacitor will prevent parasitic board inductances
from forcing V OUT below GND when the switch turns-off. For the
FPF2024, FPF2025 and FPF2026, the total output capacitance
needs to be kept below a maximum value, C OUT(max) , to prevent
the part from registering an over-current condition beyond the
Blanking Time and turning-off the switch. The maximum output
capacitance can be determined from the following formula:
Improving Thermal Performance
An improper layout could result in higher junction temperature
and ultimately trigger the thermal shutdown protection feature.
This concern applies particularly significant for the FPF2027
where the switch is in constant current mode in the overload
conditions.
The following techniques have been identified to improve the
thermal performance of this family of devices. These techniques
are listed in order of the significance of their impact.
NC pin can be connected to the GND plane to improve
thermal performance.
The V IN , V OUT and GND pins will dissipate most of the heat
generated during a high load current condition. Using wide
traces will help minimize parasitic electrical effects, along
with minimizing the case to ambient thermal impedance. The
layout suggested in Figure 24 provides each pin with
adequate copper so that heat may be transferred out of the
device as efficiently as possible. The low-power FLAGB and
C OUT(Max) =
Power Dissipation
I LIM(Max) x t BLANK(Min)
V IN
ON pin traces may be laid-out to maximize the area available
to the ground pad.
Placing the input and output capacitors as close to the device
as possible also contributes to heat dissipation, particularly
during high load currents.
During normal operation as a switch, the power dissipation is
small and has little effect on the operating temperature of the
part. The maximum power dissipation while switch is in normal
operation occurs just before a part enters the current limit. This
may be calculated using the formula bellow:
P Max(Normal Operation) = (I LIM(Max) ) 2 x R ON(Max)
= (0.2) 2 x 0.58 = 23.2 mW , for V IN =1.6V
If the part goes into current limit, the maximum power
dissipation occurs when the output of switch is shorted to
ground. For the FPF2024 and FPF2025, the power dissipation
will scale with the Auto-Restart Time, t RSTRT , and the Over
Current Blanking Time, t BLANK . In this case the maximum power
dissipated for the FPF2024 and FPF2025 is:
FPF202X Demo Board
FPF202X Demo board has components and circuitry to
demonstrate the functions and features of the FPF202X load
switch family. An N-Channel MOSFET(Q), in series with a 7.5 ?
resistor, are connected between V OUT and the GND pin of the
device. By turning on the Q transistor, the 7.5 ? is loaded to the
output voltage and simulates an over-current condition. The R2
resistor is connected between FLAGB pin and input voltage as
pull-up resistor for FPF2024, FPF2026 and FPF2027 devices.
The FPF2025 does not require a pull-up resistor due to its
CMOS output structure.
The thermal performance of the board is improved using the
P Max(Current limit) =
t BLANK
t BLANK + t RSTRT
x V IN(Max) x I LIM(Max)
techniques recommended in the layout recommendations
section of datasheet.
=
10
10 + 70
x 5.5 x 0.2 =137 mW
Take note that this is below the maximum package power
dissipation, and the thermal shutdown feature protection
provides additional safety to protect the part from damage due
to excessive heating. The junction temperature is only able to
increase to the thermal shutdown threshold. Once this
temperature has been reached, toggling ON will have no affect
until the junction temperature drops below the thermal
shutdown exit temperature. For the FPF2027, a short on the
output will cause the part to operate in a constant current state
dissipating a worst case power of:
P Max = V IN(Max) X I LIM(Max) = 5.5X0.2 =1.1 W
Output of FPF2027 is shorted to GND.
This power dissipation is significant enough that it will activate
the thermal shutdown protection, and the part will cycle in and
out of thermal shutdown so long as the ON pin is active and the
output short is present.
Figure 24. FPF202X proper layout
?2008 Fairchild Semiconductor Corporation
FPF2024/5/6/7 Final. B
14
www.fairchildsemi.com
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| FPF2027 | 功能描述:开关 IC - 各种 100mA Curr. Lmt Full Functional Load RoHS:否 制造商:Fairchild Semiconductor 开启电阻（最大值）: 电源电压-最大:4.4 V 电源电压-最小:2.5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:WLCSP-9 封装:Reel |
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