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| 型号： | FPF2313MPX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 15/17页 |
| 文件大小： | 0K |
| 描述： | IC LOAD SW 2CH ADJ CURR 8-MLP |
| 标准包装： | 1 |
| 系列： | IntelliMax™ |
| 类型： | 高端开关 |
| 输出数： | 2 |
| Rds（开）： | 140 毫欧 |
| 内部开关： | 是 |
| 电流限制： | 可调 |
| 输入电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-MLP |
| 供应商设备封装： | 8-MLP（3x3） |
| 包装： | 标准包装 |
| 其它名称： | FPF2313MPXDKR |
15mil
25mil
Figure 39. Two Through-Hole Open Vias
Embedded in DAP
3. The IN, OUTs, and GND pins dissipate most of the heat
generated during a high-load current condition. The layout
suggested in Figure 39 illustrates a proper layout for devices
Figure 41. Top, SST, and AST Layers
(MLP 3x3mm Package)
in MLP 3x3mm packages. IN, OUTs, and GND pins are
connected to adequate copper so that heat may be
transferred as efficiently as possible out of the device. The
low-power FLAGB and ON pins’ traces may be laid-out
diagonally from the device to maximize the area available to
the ground pad. Placing the input and output capacitors as
close to the device as possible also contributes to heat
dissipation, particularly during high load currents.
Figure 42. Zoom In to Top Layer
Figure 40. Proper Layout of Output and
Ground Copper Area
FPF231X Evaluation Board
FPF231X evaluation board has components and circuitry to
demonstrate FPF2310/2/3/3L load switches functions and
features accommodating both MLP 3x3mm packages. The state
of the each channel can be configured using J1 and J2 jumpers.
In addition, both channels can be controlled by ONA and ONB
test pins. Thermal performance of the board is improved using
techniques recommended in the layout recommendations
section. R3 and R4 resistors are used on the board to sink a
light load current when switches are activated.
? 2009 Fairchild Semiconductor Corporation
FPF2310/12/13/13L ? Rev. 1.1.3
15
Figure 43. Bottom and ASB Layers
www.fairchildsemi.com
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