参数资料
型号: FS-935
厂商: Digi International
文件页数: 47/48页
文件大小: 0K
描述: JTAG-BOOSTER FOR IDT64145 3.3V
标准包装: 1
系列: Digi/FS Forth
类型: 闪存
适用于相关产品: IDT64145 3.3V
所含物品: 编程器和关联的接口软件
JTAG-Booster for IDT 64145
3. Implementation Information
This chapter summarizes some information about the implementation of the
JTAG-Booster and describes some restrictions.
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In the IDT RC64145 a system reset does also reset the JTAG interface.
Observing the pin SYS_RST# (i.e. with function /PIN? or /SAMPLE) is not
possible.
The IDT RC64145 does not have a TRST# pin. The reset of the JTAG
interface is connected (internally to the IDT RC64145) to the system reset
(Pin SYS_RST#). We recommend not to connect the system reset with the
TRST# pin of the JTAG connector. Otherwise the target is reset on any
starting of the JTAG-Booster and the function /SAMPLE (see chapter 2.11)
does not work.
The JTAG-Booster uses the 32 Bit mode of the JTAG chain. To configure
the JTAG interface a pullup resistor is needed at the TDI pin. At end of the
system reset (signal SYS_RST#) the TDI pin is sampled to configure the
length of the chain. The IDT 64145 should be the first part in the JTAG
chain (nearest to TDI) to get best control of the TDI pin.
If the IDT RC64145 is configured to the wrong mode, the JTAG booster
aborts with an error message. In this case the target power should be cycled
while the JTAG-Booster is not attached to the target.
The pin SYS_DEVOE# must be connected to the output enable pin of the
Flash-EPROM.
The pin SYS_DQMWE1# must be connected to the write enable pin of the
Flash-EPROM. The pin SYS_DQMWE0# is not available in the 32Bit JTAG
chain and can not be used.
Even if there are byte wide devices used, connect SYS_DQMWE1# to all
write enable inputs of the Flash-EPROMs.
JTAG145a.doc
47
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