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参数资料
| 型号： | FSA9280AUMX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 5/30页 |
| 文件大小： | 0K |
| 描述： | IC USB MULTIMEDIA SWITCH 20-UMLP |
| 标准包装： | 1 |
| 功能： | USB 开关 |
| 电路： | 3:1 |
| 电压电源： | 单电源 |
| 电压 - 电源，单路/双路(±)： | 3 V ~ 4.4 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-UFQFN 裸露焊盘 |
| 供应商设备封装： | 20-UMLP（4x3） |
| 包装： | 标准包装 |
| 其它名称： | FSA9280AUMXDKR |
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2009 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA9280A Rev 1.1.0
13
FS
A9
2
80A
—
US
B
Po
rt
Mu
lt
im
edia
Swi
tc
h
,
Fea
turi
n
g
Automatic
Se
lect
a
nd
Ac
ces
s
ory
Detection
5.3. OCP and OVP Detection
With VBUS_IN greater than 6.8V, VBUS_IN is disconnected,
protecting the FSA9280A and all application circuitry from
excess voltage. This block is capable of withstanding
continuous
28V
in
Shutdown
Mode.
Upon
entering
Shutdown Mode, the OVP_EN bit in the Interrupt 1 register
is set HIGH and an interrupt is sent to the baseband. The
Over-Current Protection (OCP) feature limits current through
the charger FET to
≤ 1.5A. The FSA9280A automatically
senses an over-current event, shuts down VBUSOUT, and
reports this to the baseband by asserting OCP_EN in the
Interrupt 1 register. OCP Mode is only implemented when
VBUS_IN is provided by the attached accessory. Removal of
an OVP or OCP condition triggers another interrupt sent to
the processor clearing the OCP_EN and/or the OVP_EN bits
and setting the OCP_OVP_DIS bit in the Interrupt 1 register.
6. Processor Communication
Typical communication steps between the processor and the
FSA9280A during accessory detection are:
1.
INTB asserted LOW, indicating change in accessory
detection.
a)
CHG_DET asserted LOW if USB charger detected.
2.
Processor reads Interrupt registers to determine which
event occurred.
a)
Interrupt 1 (03h): Indicates if an attach, detach, key
press, long key press, long key release, OVP / OCP
event, or OVP / OCP event recovery was detected.
Each bit can be masked by setting the corresponding
bit in the Interrupt Mask 1 (05h) register.
b)
Interrupt
2
(04h):
Indicates
if
a
reserved
accessory, ADC change, stuck key, or stuck key
recovery was detected. Each bit can be masked
by setting the corresponding bit in the Interrupt
Mask 2 (06h) register.
3.
Processor reads Status registers to determine exact
accessory detected.
a)
Device Type 1 (0Ah): Indicates which USB, Car Kit
UART, or audio accessory was detected.
b)
Device Type 2 (0Bh): Indicates which factory mode
was detected or if a TTY cable was detected.
c)
Button 1 (0Ch & ODh): Indicates which button press
was detected with Audio Type 1 accessories.
d)
Car Kit Status (0Eh): Indicates which type of car kit
charger was detected.
6.1. Interrupts
The baseband processor recognizes interrupt signals by
observing the INTB signal, which is active LOW. Interrupts
are masked upon reset or power up via the INT Mask
register bit (bit 0 of Control register, address 02h in Table 7.
Register Map) and INTB pin defaults LOW right after this
reset or power up. After the INT Mask bit is cleared by the
baseband processor, the INTB pin is driven HIGH in
preparation for a future interrupt. When an interruptible event
occurs, INTB transitions LOW and returns HIGH when the
processor reads the Interrupt register at address 03h.
Subsequent to the initial power up or reset; if the processor
writes a “1” to INT Mask bit when the system is already
powered up, the INTB pin stays HIGH and ignores all
interrupts until the INT Mask bit is cleared. If an event
happens that would ordinarily cause an interrupt when the
INT Mask bit is set, the INTB pin is LOW for tINT_MASK after
the INT Mask bit is cleared.
VBAT
VDDIO
Internal Reset
INTB Mask bit
100s
INTB event
Standby Mode
Interrupt
registers read
INTB
TINT_MASK
Switch Wait Time
Figure 16.
Power-up Interrupt Timing Diagram
VBAT
VDDIO
VDDIO Reset
Internal Reset
INTB Mask bit
100s
INTB event
Standby Mode
Interrupt
registers read
INTB
TINT_MASK
Switch Wait Time
Figure 17.
VDDIO Reset Interrupt Timing Diagram
VBAT
VDDIO
INTB Mask bit
INTB event
INTB Dont Care (High or Low)
INTB event
TINT_MASK
Figure 18.
INT Mask to INTB Interrupt Timing Diagram
7. Switch Configuration
FSA9280A devices have two modes of operation when
configuring the internal switches. The FSA9280A can auto-
configure the switches or the switches can be configured
manually by the processor. Typical applications can use the
Auto-Configuration Mode and do not require interaction with
the baseband to configure the switches correctly.
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