参数资料
型号: FSEZ1317AMY
厂商: Fairchild Semiconductor
文件页数: 15/16页
文件大小: 0K
描述: IC PWM CTLR PRIMARY REG 7-SOIC
标准包装: 2,500
输出隔离: 隔离
频率范围: 47kHz ~ 53kHz
输入电压: 5.5 V ~ 23 V
输出电压: 700V
工作温度: -40°C ~ 105°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)7 引线
供应商设备封装: 7-SOP
包装: 带卷 (TR)
Physical Dimensions
6.20
5.80
5.00
4.80
3.81
7 6
5
A
4.00
3.80
B
0.65TYP
1.75TYP
3.81
3.85 7.35
PIN #1
(0.33)
1 2 3 4
1.27
TOP VIEW
0.25
C B A
1.27
LAND PATTERN RECOMMENDATION
SEE DETAIL A
0.25
0.10
0.25
0.19
1.75 MAX
0.51
0.33
C
0.10 C
OPTION A - BEVEL EDGE
FRONT VIEW
OPTION B - NO BEVEL EDGE
0.50 x 45°
R0.10
R0.10
0.25
GAGE PLANE
0.36
NOTES:
A) THIS PACKAGE DOES NOT FULLY CONFORMS
TO JEDEC MS-012 VARIATION AA.
0.90
0.406
SEATING PLANE
(1.04)
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) DRAWING FILENAME : M07Brev3
DETAIL A
SCALE: 2:1
Figure 34. 7-Lead, Small Outline Package (SOP-7)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/ .
? 2012 Fairchild Semiconductor Corporation
FSEZ1317A ? Rev. 1.0.4
15
www.fairchildsemi.com
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