参数资料
型号: FSEZ1317NY
厂商: Fairchild Semiconductor
文件页数: 3/17页
文件大小: 0K
描述: IC PWM CTLR PRIMARY REG 7-DIP
标准包装: 59
输出隔离: 隔离
频率范围: 47kHz ~ 53kHz
输入电压: 5.5 V ~ 23 V
输出电压: 700V
工作温度: -40°C ~ 105°C
封装/外壳: 8-DIP(0.300",7.62mm),7 引线
供应商设备封装: 7-DIP
包装: 带卷 (TR)
Marking Information
F : Fairchild Logo
Z: Plant Code
X: 1-Digit Year Code
Y: 1-Digit Week Code
TT: 2-Digit Die Run Code
T: Package Type (M=SOP, N=DIP)
P: Y=Green Package
M: Manufacture Flow Code
Figure 4. Top Mark
Pin Configuration
Figure 5. Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
7
8
Name
CS
VDD
GND
COMR
VS
HV
DRAIN
Description
Current Sense . This pin connects a current-sense resistor, to detect the MOSFET current for
peak-current-mode control in CV mode, and provides the output-current regulation in CC mode.
Power Supply . IC operating current and MOSFET driving current are supplied using this pin.
This pin is connected to an external V DD capacitor of typically 10μF. The threshold voltages for
startup and turn-off are 16V and 5V, respectively. The operating current is lower than 5mA.
Ground
Cable Compensation . This pin connects a 1μF capacitor between the COMR and GND pins
for compensation voltage drop due to output cable loss in CV mode.
Voltage Sense . This pin detects the output voltage information and discharge time based on
voltage of auxiliary winding.
High Voltage . This pin connects to bulk capacitor for high-voltage startup.
Driver Output . Power MOSFET drain. This pin is the high-voltage power MOSFET drain.
? 2010 Fairchild Semiconductor Corporation
FSEZ1317 ? Rev. 1.0.5
3
www.fairchildsemi.com
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