参数资料
型号: FSL127HNY
厂商: Fairchild Semiconductor
文件页数: 10/15页
文件大小: 0K
描述: IC PWM/SEMSEFET SMPS 8-MDIP
标准包装: 59
系列: FPS™
输出隔离: 隔离
频率范围: 94kHz ~ 106kHz
输入电压: 9 V ~ 30 V
输出电压: 700V
功率(瓦特): 20W
工作温度: -40°C ~ 105°C
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-DIP
包装: 管件
Functional Description
Startup Operation
For startup, the HV pin is connected to the line input or
bulk capacitor through the external resistor R HV , as
shown in Figure 23. Typical startup current drawn from
the HV pin is 3.5mA and it charges the V DD capacitor
through the resistor R HV . The startup current turns off
when the V DD capacitor voltage reaches V DD-ON . The
V DD capacitor maintains V DD until the auxiliary winding
of the transformer provides the operating current.
Green-Mode Operation
The FSL127H uses feedback voltage (V FB ) as an
indicator of the output load and modulates the PWM
frequency, as shown in Figure 25, such that the
switching frequency decreases as load decreases. In
heavy load conditions, the switching frequency is
100kHz. Once V FB decreases below V FB-N (2.5V), the
PWM frequency starts to linearly decrease from 100kHz
to 18kHz to reduce the switching losses. As V FB
decreases below V FB-G (2.4V), the switching frequency
is fixed at 18kHz and FSL127H enters “deep” green
C DC
R HV
mode to reduce the standby power consumption. As
V FB decreases below V FB-ZDC (2.1V), FSL127H enters
burst-mode operation. When V FB drops below V FB-ZDC ,
FSL127H stops switching and the output voltage starts
HV
FSL127H
VDD
D DD
C DD
N A
to drop, which causes the feedback voltage to rise.
Once V FB rises above V FB-ZDC , switching resumes. Burst
mode alternately enables and disables switching,
thereby reducing switching loss to improve power
saving, as shown in Figure 26.
AC line
Figure 23. Startup Circuit
Slope Compensation
FSL127H is designed for flyback power converter. The
peak-current-mode control is used to optimize system
performance. Slope compensation is added to stabilize
the current loop. The FSL127H inserts a synchronized,
positively sloped ramp at each switching cycle.
Soft Start
Figure 25. PWM Frequency
The FSL127H has internal soft-start circuit that slowly
increases the SenseFET current after startup. The
typical soft-start time is 5ms, during which the V Limit
level is increased in six steps to smoothly establish the
required output voltage, as shown in Figure 24. It also
helps prevent transformer saturation and reduces stress
on the secondary diode during startup.
Figure 24. Soft-Start Function
Figure 26. Burst Mode Operation
? 2010 Fairchild Semiconductor Corporation
FSL127H ? Rev. 1.0.2
10
www.fairchildsemi.com
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