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参数资料
| 型号： | FSTD16861MTDX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 4/6页 |
| 文件大小： | 0K |
| 描述： | IC SWITCH BUS 20BIT TTL 48TSSOP |
| 标准包装： | 1 |
| 类型： | 总线开关 |
| 电路： | 10 x 1:1 |
| 独立电路： | 2 |
| 电压电源： | 单电源 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 48-TSSOP |
| 包装： | 标准包装 |
| 其它名称： | FSTD16861MTDXDKR |
www.fairchildsemi.com
4
FSTD16861
AC Electrical Characteristics
Note 8: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance (Note 9)
Note 9: TA
25qC, f 1 Mhz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50
: source terminated in 50:
Note: CL includes load and stray capacitance
Note: Input PRR
1.0 MHz, tW
500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
Symbol
Parameter
TA 40 qC to 85 qC,
Units
Conditions
CL 50pF, RU RD 500:
Figure
VCC 4.5 – 5.5V
Number
Min
Max
tPHL, tPLH
Propagation Delay Bus-to-Bus (Note 8)
0.25
ns
VI OPEN
Figures
1, 2
tPZH, tPZL
Output Enable Time
1.0
6.0
ns
VI 7V for tPZL
Figures
1, 2
VI OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.0
7.0
ns
VI 7V for tPLZ
Figures
1, 2
VI OPEN for tPHZ
Symbol
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
3
pF
VCC 5.0V, VIN 0V
CI/O
Input/Output Capacitance “OFF State”
6pF
VCC, OE 5.0V, VIN 0V
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