参数资料
型号: FT24C02A-USR-B
厂商: Fremont Micro Devices USA
文件页数: 6/20页
文件大小: 0K
描述: IC EEPROM 2KBIT 1MHZ 8SOP
标准包装: 100
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 2K (256 x 8)
速度: 400kHz,1MHz
接口: I²C,2 线串口
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOP
包装: 管件
其它名称: 1219-1000
FT24C02A
DEVICE ADDRESSING
The 2-wire serial bus protocol mandates an 8 bits device address word after a START bit condition to
invoke valid read or write command. The first four most significant bits of the device address must be 1010,
which is common to all serial EEPROM devices. The next three bits are device address bits. These three
device address bits (5 th , 6 th and 7 th ) are to match with the external chip select/address pin states. If a
match is made, the EEPROM device outputs an ACKNOWLEDGE signal after the 8 th read/write bit,
otherwise the chip will go into STANDBY mode.
However, matching are not be done for “-5xx” version chips. This three device address bits are not cared
and could be coded from 000 (b) to 111 (b). Only one FT24C02A device can be used on the on 2-wire bus.
If a match is made, the EEPROM device outputs an ACKNOWLEDGE signal after the 8 th read/write bit,
otherwise the chip will go into STANDBY mode.
The last or 8 th bit is a read/write command bit. If the 8 th bit is at VIH then the chip goes into read mode. If a
“0” is detected, the device enters programming mode.
WRITE OPERATIONS
(A) BYTE WRITE
A byte write operation starts when a micro-controller sends a START bit condition, follows by a proper
EEPROM device address and then a write command. If the device address bits match the chip select
address, the EEPROM device will acknowledge at the 9 th clock cycle. The micro-controller will then
send the rest of the lower 8 bits word address. At the 18 th cycle, the EEPROM will acknowledge the
8-bit address word. The micro-controller will then transmit the 8 bit data. Following an
ACKNOWLDEGE signal from the EEPROM at the 27 th clock cycle, the micro-controller will issue a
STOP bit. After receiving the STOP bit, the EEPROM will go into a self-timed programming mode
during which all external inputs will be disabled. After a programming time of T WC , the byte
programming will finish and the EEPROM device will return to the STANDBY mode.
(B) PAGE WRITE
A page write is similar to a byte write with the exception that one to sixteen bytes can be programmed
along the same page or memory row. All FT24C02A are organized to have 16 bytes per memory row
or page.
With the same write command as the byte write, the micro-controller does not issue a STOP bit after
sending the 1 st byte data and receiving the ACKNOWLEDGE signal from the EEPROM on the 27 th
clock cycle. Instead it sends out a second 8-bit data word, with the EEPROM acknowledging at the
36 th cycle. This data sending and EEPROM acknowledging cycle repeats until the micro-controller
sends a STOP bit after the n × 9 th clock cycle. After which the EEPROM device will go into a self-
timed partial or full page programming mode. After the page programming completes after a time of
T WC , the devices will return to the STANDBY mode.
The least significant 4 bits of the word address (column address) increments internally by one after
receiving each data word. The rest of the word address bits (row address) do not change internally,
but pointing to a specific memory row or page to be programmed. The first page write data word can
be of any column address. Up to 16 data words can be loaded into a page. If more then 16 data
DS3011B-page 6
? 2009 Fremont Micro Devices Inc.
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