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参数资料
| 型号： | FTGN3025Q1TAS |
| 元件分类： | 光收发 |
| 英文描述： | FIBER OPTIC TRANSCEIVER, 1260-1360nm, 1244.16Mbps(Tx), 2488.32Mbps(Rx), PANEL MOUNT, THROUGH HOLE MOUNT, SC/APC CONNECTOR |
| 封装： | ROHS COMPLIANT |
| 文件页数： | 3/10页 |
| 文件大小： | 104K |
| 代理商： | FTGN3025Q1TAS |
FTGN3025Q1TAx GPON ONU Triple-play Product Specification - April, 2008
F i n i s a r
Finisar Corporation April 2 2008 Rev.A.1
Page 2
I.
Pin Descriptions
Pin
Symbol
Name/Description
I/O Description
Ref.
1
GND
Ground
2
GND
Ground
3
Rx Vcc
Digital Rx Power Supply
(+3.3V)
4
SD
Signal Detect
LVTTL Output, Active HIGH, host to implement pull
up resistor. Recommended value of 4.7-10K
Ω
5
RxD +
Rx Data Out Positive
LVPECL Output, AC-coupled, 100
Ω differential
termination recommended on host Board
6
RxD -
Rx Data Out Negative
LVPECL Output, AC-coupled, 100
Ω differential
termination recommended on host Board
7
BEN +
Burst Enable Positive
LVPECL Output, DC-coupled, Internal 100
Ω
differential termination
8
BEN -
Burst Enable Negative
LVPECL Input, DC-coupled, Internal 100
Ω
differential termination
9
GND
Ground
10
TxD +
Tx Data In Positive
LVPECL Input, DC-coupled, Internal 100
Ω
differential termination
11
GND
Ground
12
TxD -
Tx Data In Negative
LVPECL Input, DC-coupled, Internal 100
Ω
differential termination
13
Tx Vcc
Digital Tx Power Supply
(+3.3V)
14
SDA
Serial Data
LVTTL, host to implements pull up resistor.
Recommended value of 4.7-10K
Ω
15
SCL
Serial Clock
LVTTL, host to implements pull up resistor.
Recommended value of 4.7-10K
Ω
16
INT
Interrupt, Module Fail
Detect
LVTTL Output, Active LOW, host to implement
pull up resistor. Recommended value of 4.7-10K
Ω
17
A_Vcc
Analog Rx Power Supply
(+12V)
18
D_Vcd
Digital Power Supply
(+3.3V)
19
Reset
LVTTL, Active LOW, Implemented internal to the
module pull up resistor of 50K
Ω; Host to implement
10K
Ω pull downistor
20
GND
Ground
21
RF
GND
RF Ground
22
RF
OUT
RF Output
75
Ω Termination
23
RF
GND
RF Ground
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| FTH- 1-01 | 制造商:Richco 功能描述:TIE HOLDER FLAT WIT-18,50 NAT |
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